LNA Report

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Low Noise Amplifier Design Amplifier Specification: Center Frequency Bandwidth Noise Figure Gain Source Impedance Load Impedance Relative Permittivity of Substrate (ε) Thickness of the Substrate (h) Thickness of the conductor Transistor 2.4GHz ±5% < 3 dB As High as Possible 50 ohms 50 ohms 2.31 31.5 mil 1.2 mil Fujitsu FHX35LG HEMT 1

Transcript of LNA Report

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Low Noise Amplifier Design

Amplifier Specification:

Center Frequency

Bandwidth

Noise Figure

Gain

Source Impedance

Load ImpedanceRelative Permittivity of

Substrate (ε)Thickness of the Substrate

(h)

Thickness of the conductor

Transistor

2.4GHz

±5%

< 3 dB

As High as Possible

50 ohms

50 ohms

2.31

31.5 mil

1.2 mil

Fujitsu FHX35LG HEMT

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Design procedure for a given Noise Figure

A single stage transistor amplifier with matching networks

at the input and output terminals of the transistor are shown

below:

Zo Gs

inputmatchingcircuit

Γs Γin

Go

transistor[S]

ΓoutΓL

GL

outputmatchingcircuit

Zo

Figure 4.1

a) Check stability performance by calculating Rolette

Stability Factor K using the S-parameter of the

transistor at the given frequency and plot respective

stability circles to determine the potentially unstable

region in the Smith Chart for ҐS and ҐL.b) If the transistor is potentially unstable, it can be

stabilized by adding a ballast resistor at the drain or a

feedback resistor from drain to the source. But this

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would add to the noise figure. Otherwise we can go

for a conditionally stable design.c) Calculate unilateral figure of merit for choosing

unilateral or bilateral design. d) Calculate NFmin, Ґopt of the transistor from the S-

Parameter. Then choose a desirable noise figure

above the NFmin. Calculate the Centre and radius of

the Noise circle. Plot it in the smith chart for Ґ in plane.

e) For a unilateral case use the constant gain circles forthe desired or maximum gain. For a bilateral case use

the available power gain circle for the desired ormaximum gain. Plot any of these circles accordingly

in the Ґin plane.

f) Choose a ҐS value which is in the stable region aswell as with in the Noise circle, the corresponding

circle gain circle. We don’t use operating power gaincircles as it has to be plotted in Ґout plane. So it is

difficult to correlate with the noise circles in Ґ in plane.g) Calculate the corresponding ҐL. From these Ґ values

obtain the corresponding impedance values ZSand ZL.

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h) These are the impedance values for a given noise

figure, gain etc for the transistor. Now these have to

be matched with their corresponding Source and load

impedance Z0 (usually 50 ohms).

i) The impedance matching networks (Input and Output)

are designed using the smith chart. For e.g. in theinput side, the matching network must transform Z0

to ZS. This can be done using lumped elements likeLC based network or distributed elements like open

or short circuited stubs combined with a length of atransmission line.

j) Provide DC bias for the Q point taken from the data

sheets and take care that it is transparent with the RFoperation.

Calculated parameters and design:

The S-Parameter file FHX35LG.s2p for the given transistor

is downloaded from Fujitsu website. This file is given as aninput to a RF utility software called Appcad. Using Appcad

the following parameters are calculated at 2.4 GHz as:

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S11 = 0.925 ∟ -53.0°

S21 = 4.200 ∟ 132.5°

S12 = 0.050 ∟ 52.5°S22 = 0.500 ∟ -45.0°

K = 0.26 < 1

Stability:The transistor is potentially unstable.

The stability circles are as given below

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The unilateral figure of merit is found to be

-5.53dB < (Gt/Gtu) < 19.7dB

The error range is 25dB which is very high. So we should

use bilateral approach.Noise and Gain circles:

The Noise parameters at 2.4 GHz are calculated asNFmin = 0.42dB

Ґopt = 0.8 ∟38°Rn = 27.4

The desired Noise Figure and the Gain is selected as

1.5 dB and 12 dB

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The corresponding noise and available gain circles are

plotted as given below

Figure 4.4

The corresponding ҐS, ҐL, ZS, ZL are found as given

below

Figure 4.5

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Impedance Matching networks:

The Source impedance matching network should transform50 ohms to ZS and it is done as given below.

The load impedance matching network is as given below

The circuit is still not stable at certain frequencies. So a

ballast resistor of value 150 ohms was added at the drain. This value was obtained by tuning and optimization in

ADS.

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But this increases the noise figure to 3.128 dB which is not

acceptable. Therefore the entire circuit was treated as a 2

port network and the corresponding parameters were

calculated once again. The circuit was matched once again

at the source and load. The performance in terms of noise

figure, gain and stability was very good after the second

matching network.

Calculations for second matching:S11 = 0.806 ∟ -128.4°

S21 = 4.569 ∟ -140° S12 = 0.038 ∟ 146.3°

S22 = 0.031 ∟ 66.3°

K = 1.085 > 1NFmin = 1.177dB

Ґopt = 0.761 ∟163.86°Rn = 2.017

Then the ҐS, ҐL values are chosen for a noise figure of 2dB

and gain 11.5dB

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The corresponding impedance values are

ZS = 5.3 + j6.643

ZL = 33.815 + j6.211The second matching networks are as given below

DC Bias Network:

The operating conditions for FHX35LG are read from thedata sheet as:

Ids = 10 mA

Vgs = -0.4V

Vds = 3.0VThe DC biasing network is designed as given below

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Amplifier Simulation and Results

Schematics and Layout:

The Schematics for the amplifier drawn using ADS isshown in the next page.

The initial simulations to test the RF performance weredone with the S-Parameter file of the transistor. This modeldoesn’t need biasing circuits. But later the transistor modelwith a foot print was used, needs inclusion of biasingnetwork.

The transmission line dimensions for the ImpedanceMatching Networks and DC Bias Circuit was calculatedusing Linecalc – a utility of ADS.

After initial Simulations the schematic was transferred in toa layout specific schematic – means some modifications toensure a proper layout were done. These were

1) Adding Tee networks for branching in the layout.2) Adding via’s for grounding.3) Adding a small length of transmission line to connect

the pads of devices to other transmission lines.

All these modifications were done without affecting theperformance. This is shown in figure 5.2 below

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The Layout of the amplifier was done using the layoutconversion tool of ADS and it is as shown below

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Simulation and results

The circuit was simulated for S-parameter simulation usingADS and various parameters and their performances werenoted as given below.

S21 and gain at 2.4 GHz

Figure 5.4

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S11 and S22 (return losses):

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Noise Performance:

Stability:

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Measured results:

S11 and gain at 2.4 GHz

Figure 5.10

The measured gain at 2.4 GHz was 13.986 dB

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Return loss S11:

Figure 5.11

At 2.4 GHz -13.306dB

Figure 5.12

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