LMH6502 Wideband, Low Power, Linear-in-dB Variable … · LMH6502 SNOSA65D – OCTOBER 2003–...

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LMH6502 www.ti.com SNOSA65D – OCTOBER 2003 – REVISED MARCH 2013 LMH6502 Wideband, Low Power, Linear-in-dB Variable Gain Amplifier Check for Samples: LMH6502 1FEATURES DESCRIPTION The LMH™6502 is a wideband DC coupled 23V S = ±5V, T A = 25°C, R F = 1k,R G = 174,R L = differential input voltage controlled gain stage 100,A V =A V(MAX) = 10 Typical Values Unless followed by a high-speed current feedback Op Amp Specified. which can directly drive a low impedance load. Gain -3dB BW: 130MHz adjustment range is more than 70dB for up to 10MHz. Gain Control BW: 100MHz Maximum gain is set by external components and the Adjustment Range (Typical Over Temp): 70dB gain can be reduced all the way to cut-off. Power consumption is 300mW with a speed of 130MHz. Gain Matching (Limit): ±0.6dB Output referred DC offset voltage is less than 350mV Slew Rate: 1800V/μs over the entire gain control voltage range. Device-to- Supply Current (No Load): 27mA device Gain matching is within ±0.6dB at maximum gain. Furthermore, gain at any V G is tested and the Linear Output Current: ±75mA tolerance is ensured. The output current feedback Op Output Voltage (R L = 100): ±3.2V Amp allows high frequency large signals (Slew Rate Input Voltage Noise: 7.7nV/Hz = 1800V/μs) and can also drive heavy load current Input Current Noise: 2.4pA/Hz (75mA). Differential inputs allow common mode rejection in low level amplification or in applications THD (20MHz, R L = 100,V O = 2V PP ): 53dBc where signals are carried over relatively long wires. Replacement for CLC520 For single ended operation, the unused input can easily be tied to ground (or to a virtual half-supply in APPLICATIONS single supply application). Inverting or non-inverting gains could be obtained by choosing one input Variable Attenuator polarity or the other. AGC To provide ease of use when working with a single Voltage Controller Filter supply, V G range is set to be from 0V to +2V relative Video Imaging Processing to pin 11 potential (ground pin). In single supply operation, this ground pin is tied to a "virtual" half supply. LMH6502 gain control is linear in dB for a large portion of the total gain control range. This makes the device suitable for AGC circuits among other applications. For linear gain control applications, see the LMH6503 datasheet. The LMH6502 is available in the SOIC and TSSOP package. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2LMH is a trademark of Texas Instruments. 3All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2013, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Transcript of LMH6502 Wideband, Low Power, Linear-in-dB Variable … · LMH6502 SNOSA65D – OCTOBER 2003–...

LMH6502

www.ti.com SNOSA65D –OCTOBER 2003–REVISED MARCH 2013

LMH6502 Wideband, Low Power, Linear-in-dB Variable Gain AmplifierCheck for Samples: LMH6502

1FEATURES DESCRIPTIONThe LMH™6502 is a wideband DC coupled

23• VS = ±5V, TA = 25°C, RF = 1kΩ, RG = 174Ω, RL =differential input voltage controlled gain stage100Ω, AV = AV(MAX) = 10 Typical Values Unlessfollowed by a high-speed current feedback Op AmpSpecified.which can directly drive a low impedance load. Gain

• -3dB BW: 130MHz adjustment range is more than 70dB for up to 10MHz.• Gain Control BW: 100MHz Maximum gain is set by external components and the• Adjustment Range (Typical Over Temp): 70dB gain can be reduced all the way to cut-off. Power

consumption is 300mW with a speed of 130MHz.• Gain Matching (Limit): ±0.6dBOutput referred DC offset voltage is less than 350mV• Slew Rate: 1800V/µsover the entire gain control voltage range. Device-to-

• Supply Current (No Load): 27mA device Gain matching is within ±0.6dB at maximumgain. Furthermore, gain at any VG is tested and the• Linear Output Current: ±75mAtolerance is ensured. The output current feedback Op• Output Voltage (RL = 100Ω): ±3.2VAmp allows high frequency large signals (Slew Rate

• Input Voltage Noise: 7.7nV/√Hz = 1800V/μs) and can also drive heavy load current• Input Current Noise: 2.4pA/√Hz (75mA). Differential inputs allow common mode

rejection in low level amplification or in applications• THD (20MHz, RL = 100Ω, VO = 2VPP): −53dBcwhere signals are carried over relatively long wires.

• Replacement for CLC520 For single ended operation, the unused input caneasily be tied to ground (or to a virtual half-supply in

APPLICATIONS single supply application). Inverting or non-invertinggains could be obtained by choosing one input• Variable Attenuatorpolarity or the other.

• AGCTo provide ease of use when working with a single• Voltage Controller Filtersupply, VG range is set to be from 0V to +2V relative

• Video Imaging Processing to pin 11 potential (ground pin). In single supplyoperation, this ground pin is tied to a "virtual" halfsupply.

LMH6502 gain control is linear in dB for a largeportion of the total gain control range. This makes thedevice suitable for AGC circuits among otherapplications. For linear gain control applications, seethe LMH6503 datasheet. The LMH6502 is available inthe SOIC and TSSOP package.

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2LMH is a trademark of Texas Instruments.3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Copyright © 2003–2013, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2-80

-70

-60

-50

-40

-30

-10

0

20

30G

AIN

(dB

)

VG (V)

10

-20

0

2

4

8

10

6

GA

IN (

V/V

)

-40°C

25°C

85°C

-40°C

25°C

85°CdB

V/V

VIN_DIFF = ±0.1V

+VIN

+5V

VG

R150:

R250:

RG170:

RF1k:

RL100:

6

5

4

3

12

10

911

-VIN

LMH6502

114

8 7

2

VOUT

-5V

13

NC

LMH6502

SNOSA65D –OCTOBER 2003–REVISED MARCH 2013 www.ti.com

Typical Application

Figure 1. Gain vs. VG for Various Temperature Figure 2. AVMAX = 10V/V

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings (1) (2)

ESD Tolerance (3): Human Body 2KV

Machine Model 200V

Input Current ±10mA

VIN Differential ±(V+ -V−)

Output Current 120mA (4)

Supply Voltages (V+ - V−) 12.6V

Voltage at Input/ Output pins V+ +0.8V,V− - 0.8V

Storage Temperature Range −65°C to +150°C

Junction Temperature +150°C

Soldering Information: Infrared or Convection (20 sec) 235°C

Wave Soldering (10 sec) 260°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions forwhich the device is intended to be functional, but specific performance is not ensured. For specific specifications, see the ElectricalCharacteristics tables.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability andspecifications.

(3) Human body model: 1.5kΩ in series with 100pF. Machine model: 0Ω in series with 200pF.(4) The maximum output current (IOUT) is determined by device power dissipation limitations or value specified, whichever is lower.

Operating Ratings (1)

Supply Voltages (V+ - V−) 5V to 12V

Temperature Range −40°C to +85°C

(θJC) 45°C/W

14-Pin SOIC (θJA) 138°C/WThermal Resistance:

(θJC) 51°C/W

14-Pin TSSOP (θJA) 160°C/W

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions forwhich the device is intended to be functional, but specific performance is not ensured. For specific specifications, see the ElectricalCharacteristics tables.

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+0.2VDC

+VIN

-VIN

RF IN

R250:

RG820:

R150:

C10.01PF

+5V

-5V

0VDC

RT50:

RP110k:

RF910:

ROUT50:

RL50:2

VG

+

-

LMH6502

PORT 1

PORT 2

LMH6502

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Electrical Characteristics (1)

Unless otherwise specified, all limits specified for TJ = 25°C, VS = ±5V, AV(MAX) = 10, VCM = 0V, RF = 1kΩ, RG = 174Ω, VIN_DIFF

= ±0.1V, RL = 100Ω, VG = +2V. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min (2) Typ (2) Max (2) Units

Frequency Domain Response

BW -3dB Bandwidth VOUT < 0.5PP 130MHz

VOUT < 0.5PP, AV(MAX) = 100 50

GF Gain Flatness VOUT < 0.5VPP 30 MHz0.6V ≤ VG ≤ 2V, ±0.3dB

Att Range Flat Band (Relative to Max Gain) ±0.2dB, f < 30MHz 16dBAttenuation Range (3)

±0.1dB, f < 30MHz 7.5

BW Gain control Bandwidth VG = 1V (4) 100 MHzControl

PL Linear Phase Deviation DC to 60MHz 1.5 deg

G Delay Group Delay DC to 130MHz 2.5 ns

CT (dB) Feed-through VG = 0V, 30MHz (Output −47 dBReferred)

GR Gain Adjustment Range f < 10MHz 72dB

f < 30MHz 67

Time Domain Response

tr, tf Rise and Fall Time 0.5V Step 2.2 ns

OS % Overshoot 0.5V Step 10 %

SR Slew Rate 4V Step 1800 V/μs

Δ G Rate Gain Change Rate VIN = 0.3V, 10%-90% of Final 4.8 dB/nsOutput

Distortion & Noise Performance

HD2 2nd Harmonic Distortion 2VPP, 20MHz −55 dBc

HD3 3rd Harmonic Distortion 2VPP, 20MHz −57 dBc

THD Total Harmonic Distortion 2VPP, 20MHz −53 dBc

En tot Total Equivalent Input Noise 1MHz to 150MHz 7.7 nV/√Hz

IN Input Noise Current 1MHz to 150MHz 2.4 pA/√Hz

DG Differential Gain f = 4.43MHz, RL = 150Ω, Neg. 0.34 %Sync

(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in verylimited self-heating of the device such that TJ = TA. No ensurance of parametric performance is indicated in the electrical tables underconditions of internal self-heating where TJ > TA.

(2) Typical values represent the most likely parametric norm. Bold numbers refer to over temperature limits.(3) Flat Band Attenuation (Relative to Max Gain) Range Definition: Specified as the attenuation range from maximum which allows gain

flatness specified (either ±0.2dB or ±0.1dB) relative to AVMAX gain. For example, for f < 30MHz, here are the Flat Band Attenuationranges:±0.2dB 20dB down to 4dB = 16dB range±0.1dB 20dB down to 12.5 dB = 7.5dB range

(4) Gain Control Frequency Response Schematic:

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Electrical Characteristics(1) (continued)Unless otherwise specified, all limits specified for TJ = 25°C, VS = ±5V, AV(MAX) = 10, VCM = 0V, RF = 1kΩ, RG = 174Ω, VIN_DIFF

= ±0.1V, RL = 100Ω, VG = +2V. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min (2) Typ (2) Max (2) Units

DP Differential Phase f = 4.43MHz, RL = 150Ω, Neg. 0.10 degSync

DC & Miscellaneous Performance

GACCU Gain Accuracy (See Application VG = 2.0V 0.0 +0.6dBInformation) 1V < VG < 2V +0.6/−0.3 +3.1/−3.6

G Match Gain Matching (See Application VG = 2.0V – ±0.6dBInformation) 1 < VG < 2V – +2.8/−3.9

K Gain Multiplier (See Application 1.61 1.72 1.84 V/VInformation) 1.58 1.91

VCM Input Voltage Range Pin 3 & 6 Common Mode, ±2.0 ±2.2 V|CMRR| > 55dB (5) ±1.70

VIN_DIFF Differential Input Voltage Between pins 3 & 6 ±0.3 ±0.39 V±0.12

I RG_MAX RG Current Pins 4 & 5 ±1.70 ±2.22 mA±1.56

IBIAS Bias Current Pins 3 & 6 (6) 9 1820

µAPins 3 & 6 (6), 2.5 5VS = ±2.5V 6

TC IBIAS Bias Current Drift Pin 3 & 6 (7) 100 nA/°C

I OFF Offset Current Pin 3 & 6 0.01 2.0 µA3.6

TC IOFF Offset Current Drift See (7) 5 nA/°C

RIN Input Resistance Pin 3 & 6 750 kΩCIN Input Capacitance Pin 3 & 6 5 pF

IVG VG Bias Current Pin 2, VG = 0V (6) −300 µA

TC IVG VG Bias Drift Pin 2 (7) 20 nA/°C

R VG VG Input Resistance Pin 2 10 kΩC VG VG Input Capacitance Pin 2 1.3 pF

VOUT Output Voltage Range RL = 100Ω ±3.00 ±3.20±2.95

VRL = Open ±3.95 ±4.00

±3.82

ROUT Output Impedance DC 0.1 ΩIOUT Output Current VOUT = ±4V from Rails ±80 ±90 mA

±75

VO OFFSET Output Offset Voltage 0V < VG < 2V ±80 ±300 mV±380

+PSRR +Power Supply Rejection Ratio (8) Input Referred, 1V change, −69 −47 dBVG = 2.2V −45

−PSRR −Power Supply Rejection Ratio (8) Input Referred, 1V change, −58 −41 dBVG = 2.2V −40

CMRR Common Mode Rejection Ratio(5) Input Referred,VG = 2V −72 dB−1.8V < VCM < 1.8V

IS Supply Current No Load 27 3841

mAVS = ±2.5V, RL= Open 9.3 16

19

(5) CMRR definition: [|ΔVOUT/ΔVCM| / AV] with 0.1V differential input voltage.(6) Positive current corresponds to current flowing in the device.(7) Drift determined by dividing the change in parameter distribution average at temperature extremes by the total temperature change.(8) +PSRR definition: [|ΔVOUT/ΔV+| / AV], −PSRR definition: [|ΔVOUT/ΔV−| / AV] with 0.1V differential input voltage.

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V+

VG

+VIN

+RG

-RG

-VIN

V-

1

2

3

4

5

6

7

V-

VREF

VOUT

GND

I-

NC

V+

8

9

10

11

12

13

14

LMH6502

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Connection Diagram

14-Pin SOIC/TSSOP (Top View)See Package Numbers D (R-PDSO-G14) and PW (R-PDSO-G14)

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1

1k 100k 10M 1G

FREQUENCY (Hz)

-7

-5

-2

GA

IN (

dB)

100M1M10k

0

-1

-3

-4

-8

-6

-9

1.1V

0.3V

0.1V

1.1V

0.3V

0.1VGAIN

PHASE

AVMAX = 10

VS = ±2.5V

40

0

-40

-80

-120

-160

PH

AS

E (

°)

SEE NOTE 12

f (25 MHz/DIV)

-9

-8

-7

-6

-5

-4

-3

-2

-1

0

1

GA

IN (

dB)

-270

-225

-180

-135

-90

-45

0

45

90

135

180

PH

AS

E (

°)2

3

GAIN

PHASE

AVMAX RF (k:)

100

10

2

2k:1k:2k:

100

10

2

SEE NOTE 12

225

2700.5VPP

1

1k 100k 10M 1G

FREQUENCY (Hz)

-9

-6

GA

IN (

dB)

100M1M10k

0

-1

-4

-5

-7

-2

-3

-8

150

-350

-200

100

50

-100

-150

-250

0

-50

-300

PH

AS

E (

°)

GAIN

PHASE

-40°C

85°C

25°C

-40°C

85°C

25°C

AVMAX = 10

VG = VGMAX

VO = 0.5VPP

SEE NOTE 11

1

1k 100k 10M 1G

FREQUENCY (Hz)

-9

-6

GA

IN (

dB)

100M1M10k

0

-1

-4

-5

-7

-2

-3

-8

40

-160

-100

20

0

-60

-80

-120

-40

-140

PH

AS

E (

°)

GAIN

PHASE

0.80V

2.1V

1.0V

2.1V

0.80V

1.0V

AVMAX = 10

SEE NOTE 12

-20

GA

IN (

dB)

FREQUENCY (Hz)

SEE NOTE 12

AVMAX = 2

PIN = -8dBm

PHASE

GAIN

2.0V

1.0V

2.0V

-7

-4

-1

1

-5

-2

-3

0

-6

-100

50

150

-150

0

-50

100

PH

AS

E (

°)

-200

-250

1.0V

100 1k 10k 100k 1M 10M 100M 1G

GA

IN (

dB)

FREQUENCY (Hz)

SEE NOTE 12

AVMAX = 2

PIN = 12dBm

PHASE

GAIN2.0V

1.0V

2.0V

-7

-4

-1

1

-5

-2

-3

0

-6

-100

50

150

-150

0

-50

100

PH

AS

E (

°)

-200

-250

1.0V

100 1k 10k 100k 1M 10M 100M 1G

LMH6502

SNOSA65D –OCTOBER 2003–REVISED MARCH 2013 www.ti.com

Typical Performance CharacteristicsUnless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.

Small Signal Frequency for Various VG Large Signal Frequency for Various VG

Figure 3. Figure 4.

Frequency Response Over Temperature (AV = 10) Frequency Response for Various VG (AVMAX = 10)

Figure 5. Figure 6.

Frequency Response for Various VG (AVMAX = 10)(±2.5V) Small Signal Frequency Response for Various AVMAX

Figure 7. Figure 8.

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2.5 3 3.5 4 4.5 5 5.5 6

±SUPPLY VOLTAGES (V)

0

2

4

6

8

10

12

14

I B (P

A)

-40°C

25°C

85°C

2.5 3 3.5 4 4.5 5 5.5 60

5

10

15

20

25

30

35

40

I S (

mA

)

±SUPPLY VOLTAGE (V)

-40°C

85°C

25°C

RL = OPEN

VG = VG_MIN

2.5 3 3.5 4 4.5 5 5.5 6

0

5

10

15

20

25

30

35

40

45

I S (m

A)

±SUPPLY VOLTAGE (V)

85°C

25°C

-40°C

RL = OPEN

VG = VG_MAX

-8

-7

-6

-5

-4

-3

-2

-1

0

1

GA

IN (

dB)

f (10 MHz/DIV)

GAIN

PHASE

2.0V

0.60V

0.4V

AVMAX = 100

PIN = -22dBmSEE NOTE 12

-120

-100

-80

-60

-40

-20

0

20

40

60

PH

AS

E (

°)-8

-7

-6

-5

-4

-3

-2

-1

0

1

GA

IN (

dB)

f (10 MHz/DIV)

GAIN

PHASE

2.0V

0.60V

0.4V

AVMAX = 100

PIN = -42dBmSEE NOTE 12

-120

-100

-80

-60

-40

-20

0

20

40

60

PH

AS

E (

°)

f (25 MHz/DIV)

-9

-8

-7

-6

-5

-4

-3

-2

-1

0

1

GA

IN (

dB)

-270

-225

-180

-135

-90

-45

0

45

90

135

180

PH

AS

E (

°)

2

3

GAIN

PHASE

AVMAX RF (k:)

100

10

2

2k:1k:2k:

100

10

2

SEE NOTE 12

225

2705VPP

LMH6502

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Typical Performance Characteristics (continued)Unless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.Frequency Response for Various VG (AVMAX= 105)

Large Signal Frequency Response for Various AVMAX (Small Signal)

Figure 9. Figure 10.

Frequency Response for Various VG (AVMAX= 105)(Large Signal) IS vs. VS

Figure 11. Figure 12.

IS vs. VS Input Bias Current vs. VS

Figure 13. Figure 14.

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1k 100k 100M

FREQUENCY (Hz)

-120

-80

0

CM

RR

(dB

)

10M1M10k

-20

-60

-100

-40

MAX GAIN

MID GAIN

VS = ±5V

AVMAX = 10

PIN = 0dBm

SEE NOTE 9

1k 100k 100M

FREQUENCY (Hz)

-120

-80

0

CM

RR

(dB

)

10M1M10k

-20

-60

-100

-40

VS = ±2.5V

AVMAX = 10

PIN = 0dBm

SEE NOTE 9

0

1k 100k 100M

FREQUENCY (Hz)

-80

-50PS

RR

(dB

)

10M1M10k

-20

-30

-60

-70

-40

-10VS = ±5V

VG = VGMAX

+PSRR

-PSRR

SEE NOTE 10

1k 100k 100M

FREQUENCY (Hz)

-45

-35

0

PS

RR

(dB

)

10M1M10k

-10

-15

-40

-5

-20

-25

-30

+PSRR

-PSRR

VS = ±2.5V

VG = VGMAX

SEE NOTE 10

-1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1-2

0

2

4

6

8

10

12

AV

MA

X (

V/V

)

VCM (V)

VS = ±2.5V

VIN_DIFF = 0.1V

VG = VGMAX

-40°C

85°C

25°C

-3 -2 -1 0 1 2 3

VCM (V)

0

2

4

6

8

10

12

AV

MA

X (

V/V

) 25°C85°C -40°C

VS = ±5V

VIN_DIFF = 0.1V

VG = VGMAX

LMH6502

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Typical Performance Characteristics (continued)Unless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.AVMAX vs. VCM AVMAX vs. VCM

Figure 15. Figure 16.

PSRR ±5V PSRR ±2.5V

Figure 17. Figure 18.

CMRR ±5V CMRR ±2.5V

Figure 19. Figure 20.

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-3 -2 -1 0 1 2 3

VCM (V)

-40

-30

-20

-10

0

10

20

30

VO

_OF

FS

ET (

mV

)

-40°C

85°C

25°C

VS = ±5V

VG = VGMAX

25°C

-3 -2 -1 0 1 2 3

VCM (V)

100

110

120

130

140

150

160

170

VO

_OF

FS

ET (

mV

)

-40°C

85°C

25°C

VS = ±5V

VG = VGMAX

25°C

-3 -2 -1 0 1 2 3

VCM (V)

-90

-80

-70

-60

-50

-40

-30

VO

_OF

FS

ET (

mV

)

-40°C

85°C

25°C

VS = ±5V

VG = VGMAX

-1.5 -1 -0.5 0 0.5 1 1.5

VCM (V)

0

2

4

6

8

10

12

14

I S (m

A)

-40°C

85°C 25°C

VS = ±2.5V

VG = VGMAX

-3 -2 -1 0 1 2 3

VCM (V)

0

5

10

15

20

25

30

35

I S (m

A)

-40°C 25°C

85°C 25°C

VS = ±5V

VG = VGMAX

2 3 4 5 60

2

4

6

8

10

12

14

AV

MA

X (

V/V

)

±SUPPLY VOLTAGE (V)

25°C

85°C

-40°C

VG = VG_MAX

VIN_DIFF = 0.1V

LMH6502

www.ti.com SNOSA65D –OCTOBER 2003–REVISED MARCH 2013

Typical Performance Characteristics (continued)Unless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.AVMAX vs. Supply Voltage Supply Current vs. VCM

Figure 21. Figure 22.

Output Offset Voltage vs. VCMSupply Current vs. VCM (Typical Unit #1)

Figure 23. Figure 24.

Output Offset Voltage vs. VCM Output Offset Voltage vs. VCM(Typical Unit #2) (Typical Unit #3)

Figure 25. Figure 26.

Copyright © 2003–2013, Texas Instruments Incorporated Submit Documentation Feedback 9

Product Folder Links: LMH6502

10 100 1k 2k1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

2.1

K (

V/V

)

RG (:)

RF = 477:

RF = 690:

RF = 1.3k:

RF = 6.18k:

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2-80

-70

-60

-50

-40

-30

-10

0

20

30

GA

IN (

dB)

VG (V)

10

-20

MAX VALUE

MIN VALUE

VIN_DIFF = ±0.1V

GAIN (TYPICAL)

0 5M 10M 15M 20M 25M 30M 35M 40M

FREQUENCY (Hz)

2.00

2.10

2.20

2.30

2.40

2.50

2.60

GR

OU

P D

ELA

Y (

ns)

VG = VGMAX

AVMAX = 10

-40 -20 10 30100

10k

10M

100M

GA

IN F

LAT

NE

SS

(R

ELA

TIV

E T

O M

AX

GA

IN)

(Hz)

1M

100k

1k

-30 -10 0 20

RF = 1k:

RG = 170

PIN = -10dBm

VG VARIED

±0.1dB

±0.2dB

GAIN (dB)

100 10k

-120

-60

0

60

GA

IN (

dB)

10M100k1k 200M

FREQUENCY (Hz)

1M

-100

-80

-40

-20

20

40

AVMAX = 2

AVMAX =10

AVMAX = 100

0 6M 12M 18M 24M 30M-0.6

-0.5

-0.4

-0.3

-0.2

-0.1

0

0.1

0.2

0.3

0.4

GA

IN (

dB)

FREQUENCY (Hz)

-1.6

-1.2

-0.8

-0.4

0

0.4

0.8

1.2

1.6

2

2.4

LIN

EA

R P

HA

SE

DE

VIA

TIO

N (

°)

GAIN

PHASE

2.1V

1.0V

0.80V

0.80V 1.0V

2.1V

SEE NOTE 12

LMH6502

SNOSA65D –OCTOBER 2003–REVISED MARCH 2013 www.ti.com

Typical Performance Characteristics (continued)Unless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.Feed through Isolation Gain Flatness and Linear Phase Deviation vs. VG

Figure 27. Figure 28.

Gain Flatness Frequency vs. Gain (1) Group Delay vs. Frequency

Figure 29. Figure 30.

K Factor vs. RG Gain vs. VG Including Limits

Figure 31. Figure 32.

(1) Flat Band Attenuation (Relative to Max Gain) Range Definition: Specified as the attenuation range from maximum which allows gainflatness specified (either ±0.2dB or ±0.1dB) relative to AVMAX gain. For example, for f < 30MHz, here are the Flat Band Attenuationranges:±0.2dB 20dB down to 4dB = 16dB range±0.1dB 20dB down to 12.5 dB = 7.5dB range

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Product Folder Links: LMH6502

-0.5 0 0.5 1 1.5 2 2.5

0

2

4

6

8

10

12

14

16

18

20

VO

_OF

FS

ET (

mV

)

VG (V)

-40°C

85°C

25°C

-40°C

85°C

-0.5 0 0.5 1 1.5 2 2.5

0

20

40

60

80

100

120

140

160

180

VO

_OF

FS

ET (

mV

)

VG (V)

-40°C

85°C

25°C

-40°C

25°C

VG (V)

-1.4 -0.9 -0.4 0.1 0.6-80

-70

-60

-50

-40

-30

30

GA

IN (

dB)

1.1

-20

-10

0

10

20 VS = ±2.5V

RF = 1k:

RG = 170:

-0.5 0 0.5 1 1.5 2 2.5-90

-80

-70

-60

-50

-40

-30

-20

-10

0

VO

_OF

FS

ET (

mV

)

VG (V)

-40°C

25°C

85°C

100 1k 10k 100k

RF (:)

1

10

100

1000

BW

(M

Hz)

RG = 27:

RG = 47:

RG = 1190:

RG = 466:

RG = 180:

RG = 100:

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2-80

-70

-60

-50

-40

-30

-10

0

20

30

GA

IN (

dB)

VG (V)

10

-20

0

2

4

8

10

6

GA

IN (

V/V

)

-40°C

25°C

85°C

-40°C

25°C

85°CdB

V/V

VIN_DIFF = ±0.1V

LMH6502

www.ti.com SNOSA65D –OCTOBER 2003–REVISED MARCH 2013

Typical Performance Characteristics (continued)Unless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.BW vs. RF Gain vs. VG (±5V)

Figure 33. Figure 34.

Output Offset Voltage vs. VGGain vs. VG (±2.5V) (Typical Unit #1)

Figure 35. Figure 36.

Output Offset Voltage vs. VG Output Offset Voltage vs. VG(Typical Unit #2) (Typical Unit #3)

Figure 37. Figure 38.

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100 1k 10k 100k 1M

FREQUENCY (Hz)

10

100

1000

10000

eno

(nV

/H

z)

MAX GAIN

MID GAIN

NO GAIN

AVMAX = 10

RF = 1k:

RG = 180:

10 100 1k 10k 1M

FREQUENCY (Hz)

10

100

10k

100k

100k

e n(O

UT

) (n

V/

Hz)

1k

MAX GAIN

MID GAIN

NO GAIN

AVMAX = 100

RF = 2k:

RG = 24:

10 1k 100k 10M

10

100

10000

100000

1M10k100

1000

FREQUENCY (Hz)

VGMAX

VGMID

VGMIN

AVMAX = 2

RF = 974:

RG = 902:e n

o (n

V/

Hz)

2.5 3 3.5 4 4.5 5 5.5 6 6.5

±VS (V)

0

50

100

150

200

250

VO

_OF

FS

ET (

mV

)

MAX

MID

MIN

2.5 3 3.5 4 4.5 5 5.5 6 6.5

±VS (V)

-120

-100

-80

-60

-40

-20

0

VO

_OF

FS

ET (

mV

)

MAX

MID

MIN

2.5 3 3.5 4 4.5 5 5.5 6 6.5

±VS (V)

-10

-5

0

5

10

15

20

25

VO

_OF

FS

ET (

mV

)

MAX

MIN

MID

LMH6502

SNOSA65D –OCTOBER 2003–REVISED MARCH 2013 www.ti.com

Typical Performance Characteristics (continued)Unless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.Output Offset Voltage vs. ±VS for various VG Output Offset Voltage vs. ±VS for various VG

(Typical Unit# 1) (Typical Unit# 2)

Figure 39. Figure 40.

Output Offset Voltage vs. ±VS for various VG(Typical Unit# 3) Noise vs. Frequency (AVMAX = 2)

Figure 41. Figure 42.

Noise vs. Frequency (AVMAX = 10) Noise vs. Frequency (AVMAX = 105)

Figure 43. Figure 44.

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-10 -5 0 5 10 15 200

10

20

30

40

50

60

70

80

90

100

|TH

D (

dBc)

|

POUT (dBm)

20MHz

1MHz

VG = VGMID = 1.0V

0.6 0.8 1 1.2 1.4 1.6 1.8 2

VG (V)

20

30

40

50

60

70

80

90

|HD

2 O

R H

D3

(dB

c)|

HD2, 0.25VPP

HD3, 0.25VPP

HD3, 1VPP

HD2,1VPP

HD2, 2VPP

HD3, 2VPP f = 20MHz

-10 -5 0 5 10 15 20

POUT (dBm)

40

50

60

70

80

90

100

|HD

(dB

c)|

HD2, 20MHz

HD3, 20MHz

HD2, 1MHz

HD3, 1MHz

-10 -5 0 5 10 15 200

10

20

30

40

50

60

70

80

90

100

|TH

D (

dBc)

|

POUT (dBm)

20MHz

1MHz

VG = VGMAX = 2.0V

0 20 40 60 80 100

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

VO

UT F

RO

M S

UP

PLY

(V

)

IOUT (mA)

SOURCE

SINK

VIN_DIFF = ±0.5V

0 20 40 60 80 100 120 140 160

FREQUENCY (MHz)

10

12

14

16

18

20

22

24

-1dB

CO

MP

RE

SS

ION

(dB

m)

RF = 620:

RF = 1.46k:

VG = VGMAX

RG = 160:

LMH6502

www.ti.com SNOSA65D –OCTOBER 2003–REVISED MARCH 2013

Typical Performance Characteristics (continued)Unless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.−1dB Compression Output Voltage vs. Output Current

Figure 45. Figure 46.

HD2 & HD3 vs. POUT THD vs. POUT

Figure 47. Figure 48.

THD vs. POUT HD2 & HD3 vs. VG

Figure 49. Figure 50.

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0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

VG

(V

)

t (10ns/DIV)

0

1

2

3

4

5

6

7

8

9

10

GA

IN (

V/V

)

VG

GAIN

VIN= 0.3V

AVMAX= 10

RL= 100:

VG Stepped From 0.6V To 1.6V

2.5VPP LARGE SIGNAL

0.5VPP SMALL SIGNAL

4 ns/DIV

SS REF

LS REF

VG = VG_MID

0 0.5 1 1.5 2 2.5

-50

-150

-250

-350

I VG

(P

A)

VG (V)

5VPP LARGE SIGNAL

0.5VPP SMALL SIGNAL

4 ns/DIV

SS REF

LS REF

0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.000

10

20

30

40

50

60

70

80

|TH

D (

dBc)

|

VG (V)

2VPP

1VPP

0.25VPP

f = 20MHz

0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.000

10

20

30

40

50

60

70

80

90

100

|TH

D (

dBc)

|

VG (V)

2VPP

0.25VPP

1VPP

f = 1MHz

LMH6502

SNOSA65D –OCTOBER 2003–REVISED MARCH 2013 www.ti.com

Typical Performance Characteristics (continued)Unless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.THD vs. VG THD vs. VG

Figure 51. Figure 52.

VG Bias Current vs. VG Step Response Plot

Figure 53. Figure 54.

Step Response Plot Gain vs. VG Step

Figure 55. Figure 56.

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0

VG

(0.

5V/D

IV)

t (10ns/DIV)

0

VO

UT (

50m

V/D

IV)

VG

VOUT

AVMAX= 10

RL= 100:

VG Stepped From 0.6V To 1.6V

LMH6502

www.ti.com SNOSA65D –OCTOBER 2003–REVISED MARCH 2013

Typical Performance Characteristics (continued)Unless otherwise specified: VS = ±5V, 25°C, VG = VGMAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL

= 100Ω, Typical values, results referred to device output.Feedthrough from VG

Figure 57.

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RG = RF x 1.72

AVMAX- 3: WITH RF = 1K:

LMH6502

SNOSA65D –OCTOBER 2003–REVISED MARCH 2013 www.ti.com

APPLICATION INFORMATION

THEORY OF OPERATION

A simplified schematic is shown in Figure 58. +VIN and −VIN are buffered with closed loop voltage followersinducing a signal current in Rg proportional to (+VIN) - (−VIN), the differential input voltage. This current controls acurrent source which supplies two well-matched transistor, Q1 and Q2.

The current flowing through Q2 is converted to the final output voltage using RF and the output amplifier, U1. Bychanging the fraction of the signal current "I" which flows through Q2, the gain is changed. This is done bychanging the voltage applied differentially to the bases of Q1 and Q2. For example, with VG = 0V, Q1 conductsheavily and Q2 is off. With none of "I" flowing through RF, the LMH6502's input to output gain is stronglyattenuated. With VG = +2V, Q1 is off and the entire signal current flows through Q2 to RF producing maximumgain. With VG set to 1V, the bases of Q1 and Q2 are set to approximately the same voltage, Q1 and Q2 have thesame collector currents - equal to one half of the signal current "I", thus the gain is approximately one half themaximum gain.

Figure 58. LMH6502 Block Diagram

CHOOSING RF & RG

Maximum input amplitude and maximum gain are the two key specifications that determine component values ina LMH6502 application.

The output stage op amp is a current-feedback type amplifier optimized for RF = 1kΩ. RG can then be computedas:

(1)

To determine whether the maximum input amplitude will overdrive the LMH6502, compute:VDMAX = (RG + 3.0Ω) × 1.70mA (2)

the maximum differential input voltage for linear operation. If the maximum input amplitude exceeds the aboveVDMAX limit, then LMH6502 should either be moved to a location in the signal chain where input amplitudes arereduced, or the LMH6502 gain AVMAX should be reduced or the values for RG and RF should be increased. Theoverall system performance impact is different based on the choice made. If the input amplitude is reduced, re-compute the impact on signal-to-noise ratio. If AVMAX is reduced, post LMH6502 amplifier gain, should beincreased, or another gain stage added to make up for reduced system gain. To increase RG and RF, computethe lowest acceptable value for RG:

RG > 590 × VDMAX - 3Ω (3)

Operating with RG larger than this value insures linear operation of the input buffers.

RF may be computed from selected RG and AVMAX: RF should be > = 1kΩ for overall best performance, howeverRF < 1kΩ can be implemented if necessary using a loop gain reducing resistor to ground on the invertingsumming node of the output amplifier (see application note OA-13 (SNOA366) for details).

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Product Folder Links: LMH6502

A(V/V) = K x RF

RGx

1

1 - VG

1 + e VC

LMH6502

www.ti.com SNOSA65D –OCTOBER 2003–REVISED MARCH 2013

ADJUSTING OFFSET

Offset can be broken into two parts; an input-referred term and an output-referred term. The input-referred offsetshows up as a variation in output voltage as VG is changed. This can be trimmed using the circuit in Figure 59 byplacing a low frequency square wave (VLOW = 0V, VHIGH = 2V into VG with VIN = 0V, the input referred VOS termshows up as a small square wave riding a DC value. Adjust R10 to null the VOS square wave term to zero. Afteradjusting the input-referred offset, adjust R14 (with VIN = 0, VG = 0) until VOUT is zero. Finally, for invertingapplications VIN may be applied to pin 6 and the offset adjustment to pin 3. These steps will minimize the outputoffset voltage. However, since the offset term itself varies with the gain setting, the correction is not perfect andsome residual output offset will remain at in-between VG's. Also, this offset trim does not improve output offsettemperature coefficient.

Figure 59. Nulling the output offset voltage

GAIN ACCURACY

Defined as the actual gain compared against the theoretical gain at a certain VG (results expressed in dB).

Theoretical gain is given by:

(4)

Where K = 1.72 (nominal) & VC = 90mV @ room temperature.

For a VG range, the value specified in the tables represents the worst case accuracy over the entire range. The"Typical" value would be the worst case difference between the "Typical Gain" and the "Theoretical gain". The"Max" value would be the worst case difference between the max/min gain limit and the "Theoretical gain".

GAIN MATCHING

Defined as the limit on gain variation at a certain VG (expressed in dB). Specified as "Max" only (no "Typical").For a VG range, the value specified represents the worst case matching over the entire range. The "Max" valuewould be the worst case difference between the max/min gain limit and the typical gain.

NOISE

Figure 60 describes the LMH6502's output-referred spot noise density as a function of frequency with AVMAX =10V/V. The plot includes all the noise contributing terms. However, with both inputs terminated in 50Ω, the inputnoise contribution is minimal. At AVMAX = 10V/V, the LMH6502 has a typical input-referred spot noise density (ein)of 7.7nV/ flat-band. For applications extending well into the flat-band region, the input RMS voltage noise canbe determined from the following single-pole model:

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100 1k 10k 100k 1M

FREQUENCY (Hz)

10

100

1000

10000

eno

(nV

/H

z)

MAX GAIN

MID GAIN

NO GAIN

AVMAX = 10

RF = 1k:

RG = 180:

VRMS = ein * 1.57 * (-3dB BANDWIDTH)

LMH6502

SNOSA65D –OCTOBER 2003–REVISED MARCH 2013 www.ti.com

(5)

Figure 60. Output Referred Voltage Noise vs. Frequency

CIRCUIT LAYOUT CONSIDERATIONS & EVALUATION BOARD

A good high frequency PCB layout including ground plane construction and power supply bypassing close to thepackage are critical to achieving full performance. The amplifier is sensitive to stray capacitance to ground at theI− input (pin 12); keep node trace area small. Shunt capacitance across the feedback resistor should not be usedto compensate for this effect. For best performance at low maximum gains (AVMAX < 10) +RG and -RGconnections should be treated in a similar fashion. Capacitance to ground should be minimized by removing theground plane from under the body of RG.. Parasitic or load capacitance directly on the output (pin 10) degradesphase margin leading to frequency response peaking.

The LMH6502 is fully stable when driving a 100Ω load. With reduced load (e.g. 1kΩ) there is a possibility ofinstability at very high frequencies beyond 400MHz especially with a capacitive load. When the LMH6502 isconnected to a light load as such, it is recommended to add a snubber network to the output (e.g. 100Ω and39pF in series tied between the LMH6502 output and ground). CL can also be isolated from the output by placinga small resistor in series with the output (pin 10).

Component parasitics also influence high frequency results. Therefore it is recommended to use metal filmresistors such as RN55D or leadless components such as surface mount devices. High profile sockets are notrecommended.

Texas Instruments suggests the following evaluation boards as a guide for high frequency layout and as an aid indevice testing and characterization:

Device Package Evaluation Board Part Number

LMH6502MA SOIC LMH730033

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Product Folder Links: LMH6502

+

-

R1510:

RG160:

LMH6502VOUT

COUT0.1µF

ROUT50:

RF1k:

3

2

76

112

14

119

8

10

13

C10.1µF

R2510:

VS VS/2

VG

+

-

+VIN

-VIN

R1510:

RG180:

R32k:

LMH6502

R42k:

VOUT

COUT0.1µF

ROUT50:

RF1k:

3

2

76

112

14

119

8

10

13

VG

C10.1µF

R2510:

VS

VS/2

LMH6502

www.ti.com SNOSA65D –OCTOBER 2003–REVISED MARCH 2013

SINGLE SUPPLY OPERATION

It is possible to operate the LMH6502 with a single supply. To do so, tie pin 11 (GND) to a potential about midpoint between V+ and V−. Two examples are shown in Figure 61 & Figure 62.

Figure 61. AC Coupled Single Supply VGA

Figure 62. Transformer Coupled Single Supply VGA

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OPERATING AT LOWER SUPPLY VOLTAGES

The LMH6502 is rated for operation down to 5V supplies (V+ -V−). There are some specifications shown foroperation at ±2.5V within the data sheet (i.e. Frequency Response, CMRR, PSRR, Gain vs. VG, etc.). Comparedto ±5V operation, at lower supplies:

a) VG range shifts lower.Here are the approximate expressions for various VG voltages as a function of V+:

Table 1. VG Definition Based on V+

VG Definition Expression (V)

VG_MIN Gain Cut-off 0.2 × V+ −1

VG_MID AVMAX/2 0.2 × V+

VG_MAX AVMAX 0.2 × V+ +1

b) VG_LIMIT (maximum permissible voltage on VG) is reduced. This is due to limitations within the devicearising from transistor headroom. Beyond this limit, device performance will be affected (non-destructive).This could reveal itself as premature high frequency response roll-off. With ±2.5V supplies, VG_LIMIT isbelow 1.1V whereas VG = 1.5V is needed to get maximum gain. This means that operating under theseconditions has reduced the maximum permissible voltage on VG to a level below what is needed to getMax gain. If supply voltages are asymmetrical with V+ being lower, further "pinching" of VG range couldresult; for example, with V+ = 2V, and V− = −3V, VG_LIMIT = 0.40V which results in maximum gain being2.5dB less than what would be expected when VS is higher.

c) "Max_gain" reduces. There is an intrinsic reduction in max gain when the total supply voltage is reduced(see Typical Performance Characteristics plots for Gain vs. VG (VS = ±2.5V). In addition, there is the moredrastic mechanism described in "b" above. Beyond VG_LIMIT, high frequency response is also effected.

Application Circuits

AGC LOOP

Figure 63 shows a typical AGC circuit. The LMH6502 is followed up with a LMH6714 for higher overall gain. Theoutput of the LMH6714 is rectified and fed to an inverting integrator using a LMH6657 (wideband voltagefeedback op amp). When the output voltage, VOUT, is too large the integrator output voltage ramps downreducing the net gain of the LMH6502 and VOUT. If the output voltage is too small, the integrator ramps upincreasing the net gain and the output voltage. Actual output level is set with R1. To prevent shifts in DC outputvoltage with DC changes in input signal level, trim pot R2 is provided. AGC circuits are always limited in therange of input signals over which constant output level can be maintained. In this circuit, we would expect thatreasonable AGC action could be maintained for at least 40dB. In practice, rectifier dynamic range limits reducethis slightly.

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Figure 63. Automatic Gain Control (AGC) Loop

FREQUENCY SHAPING

Frequency Shaping Frequency shaping and bandwidth extension of the LMH6502 can be accomplished usingparallel networks connected across the RG ports. The network shown in the Figure 64 schematic will effectivelyextend the LMH6502's bandwidth.

Figure 64. Frequency Shaping

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REVISION HISTORY

Changes from Revision C (March 2013) to Revision D Page

• Changed layout of National Data Sheet to TI format .......................................................................................................... 21

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PACKAGE OPTION ADDENDUM

www.ti.com 17-Mar-2017

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

LMH6502MA/NOPB ACTIVE SOIC D 14 55 Green (RoHS& no Sb/Br)

CU SN Level-1-260C-UNLIM -40 to 85 LMH6502MA

LMH6502MAX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)

CU SN Level-1-260C-UNLIM -40 to 85 LMH6502MA

LMH6502MT/NOPB ACTIVE TSSOP PW 14 94 Green (RoHS& no Sb/Br)

CU SN Level-1-260C-UNLIM -40 to 85 LMH6502MT

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

PACKAGE OPTION ADDENDUM

www.ti.com 17-Mar-2017

Addendum-Page 2

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

LMH6502MAX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 2-Sep-2015

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LMH6502MAX/NOPB SOIC D 14 2500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 2-Sep-2015

Pack Materials-Page 2

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