LLINEAR TECHNOLINEAR TECHNOLOINEAR TECHNOLOOGGYGY · 2 Linear Technology Magazine • November 1999...

LINEAR TECHNOLOGYLINEAR TECHNOLOGYLINEAR TECHNOLLINEAR TECHNOLOGOGYNOVEMBER 1999 VOLUME IX NUMBER 4

continued on page 3, LTC and LT are registered trademarks of Linear Technology Corporation. Adaptive Power, Burst Mode, C-Load,

FilterCAD, Hot Swap, LinearView, Micropower SwitcherCAD, No Latency ∆Σ, No RSENSE, Operational Filter, OPTI-LOOP,Over-The-Top, PolyPhase, PowerSOT, SwitcherCAD and UltraFast are trademarks of Linear Technology Corporation.Other product names may be trademarks of the companies that manufacture the products.

SOT-23 Micropower,Rail-to-Rail Op AmpsOperate with Inputsabove the PositiveSupplyIntroductionThe only SOT-23 op amps featuringOver-The-Top™ operation—the abil-ity to operate with either or bothinputs above the positive rail—arethe 55µ A LT1782 and the 300µ ALT1783. Over-The-Top operation isimportant in many current-sensingapplications, where the inputs arerequired to operate at or above thesupply. A wide supply voltage range,from 2.7V to 18V, gives the LT1782/LT1783 broad applicability. The guar-anteed offset voltage of 950µV overtemperature is the lowest of any SOT-23 op amp. There is even a shutdownfeature for ultralow supply currentapplications.

General Purpose AppealThe LT1782/LT1783 SOT-23 op ampsare ideal for general-purpose applica-tions that demand high performance.These SOT-23 op amps handle inputvoltages as high as 18V, bothdifferential and common mode, inde-pendent of the supply voltage, makingthem ideal for applications with wideinput range requirements and/orunusual input conditions. (For adescription of the unique input stagethat achieves this, see Linear Tech-nology VIII:2, May 1998, p.10.) In

applications that require more band-width than the 200kHz LT1782, theLT1783’s sixfold increase in supplycurrent gives it six times more band-width and slew rate. The LT1782/LT1783 are available in two pinouts:a 6-lead version with a shutdownfeature that reduces supply currentto only 5µ A and a standard-pinout5-lead version. Table 1 summarizesthe performance of these new op amps.

Read All of the SpecsThe appeal of other SOT-23 op ampsbegins to diminish when the specifi-cations are reviewed in detail.Common factors that keep most SOT-23 parts from being general-purposeamplifiers include low supply voltagerange, high input offset voltage, lowvoltage gain and poor output stageperformance.

To address these problems, theLT1782/LT1783 are fabricated onLinear Technology’s “workhorse” highspeed bipolar process, which allowsthe amplifiers to operate on all singleand split supplies with a total voltageof 2.7V to 18V. For improved preci-sion, thin film resistors are tightlytrimmed at wafer sort; this guaran-tees that the input offset voltage will

by Raj Ramchandani

IN THIS ISSUE…COVER ARTICLESOT-23 Micropower, Rail-to-RailOp Amps Operate with Inputs abovethe Positive Supply ....................... 1Raj Ramchandani

Issue Highlights ............................ 2

LTC® in the News… ...................... 2

DESIGN FEATURES3ppm/°C Micropower Reference DrawsOnly 50µA and Operates on 2.8V..................................................... 4

John Wright

Smart Battery Charger IsProgrammed via the SMBus ........... 6Mark Gurries

LTC1755 Smart Card InterfaceProvides Inductorless Boost andSignal-Level Translators ............. 11Steven Martin

LT®1306: Synchronous Boost DC/DCConverter Disconnects Outputin Shutdown ............................... 14Bing Fong Ma

Versatile Dual Hot SwapController/Power Sequencer AllowsLive Backplane Insertion ............. 19Bill Poucher

LTC1642: a Hot Swap Controllerwith Foldback Current Limitingand Overvoltage Protection ......... 23Pat Madden

DESIGN IDEASCost and Space EfficientBacklighting for Small LCD Panels................................................... 27

Jim Williams

High Efficiency PolyPhase ConverterCombines Power from Multiple Inputs................................................... 28

Wei Chen and Craig Varga

Isolated RS485 TransceiverBreaks Ground Loops .................. 29Mitchell Lee

(More Design Ideas on pages 33–37;complete list on page 27)

New Device Cameos ..................... 37

Design Tools ................................ 39

Sales Offices ............................... 40

Linear Technology Magazine • November 19992

EDITOR’S PAGE

Issue HighlightsOur cover article for this issue intro-duces the LT1782/LT1783, the onlySOT-23 op amps featuring Over-The-Top operation—the ability to operatewith either or both inputs above thepositive rail. Over-The-Top operationis important in many current-sens-ing applications, where the inputsare required to operate at or above thesupply. A wide supply voltage range,from 2.7V to 18V, gives the LT1782/LT1783 broad applicability. The guar-anteed offset voltage of 950µ V overtemperature is the lowest of anySOT-23 op amp.

In our Design Features section, wedebut a new micropower, precisionvoltage reference: the new LT1461bandgap voltage reference is a lowdropout reference that has superbtemperature coefficient, tight outputtolerance and low supply current.High output current and unmeasur-able thermal regulation make theLT1461 ideal for micropower preci-sion regulator applications. To achievethese characteristics, new wafer trimtechniques were developed andextensive characterization of thermalhysteresis and long-term drift wereperformed.

In the power realm, we present twonew products: The LTC1759 SmartBattery Charger and the LT1306synchronous boost converter. TheLTC1759 is a Smart Battery Chargerthat offers constant-current (CC) andconstant-voltage (CV), chargingmodes. The LTC1759 also incorpo-rates such features as SMBusprogrammable output voltage andcurrent, external, resistor program-mable current limit, LTC’s patentedprogrammable AC wall adapter cur-rent limiting to maximize charge rateand efficiencies as high as 95%.

The LT1306 is a synchronous boostDC/DC converter with the ability todisconnect its output from its inputin shutdown (traditional boost con-verters lack this ability). Additionally,the LT1306 can regulate the outputwhen the input voltage exceeds the

output voltage. This is useful, forexample, for generating a 5V supplyfrom a 4-cell alkaline battery. Lastly,inrush current is controlled, so a newbattery can be installed without risk-ing high inrush current as the batteryinitially charges the output capacitor.

Two new additions to LTC’s HotSwap™ controller family, the LTC1642and LTC1645, are premiered in thisissue. The LTC1642 limits the charg-ing current drawn by a board’scapacitors, allowing safe circuit boardinsertion into a hot backplane. It alsooffers additional capabilities, somenew to the Hot Swap family: a maxi-mum recommended operating voltageof 16.5V, a programmable electroniccircuit breaker with foldback currentlimiting, overvoltage protection to 33V,and a voltage reference and uncom-mitted comparator.

The LTC1645’s two channels canbe set to ramp up and down sepa-rately at a programmable rate or theycan be programmed to rise and fallsimultaneously, ensuring power sup-ply tracking at the two outputs. Twohigh-side switch drivers control theexternal N-channel FET gates for sup-ply voltages ranging from 1.2V to12V. Programmable electronic circuitbreakers protect against shorts ateither output.

Another new interface product isthe LTC1755 smart card interface.The LTC1755 provides a simple andcomplete solution to smart cardinterfacing. Requiring only two bypasscapacitors and one charge pumpcapacitor, the LTC1755 interfacesseamlessly between a smart cardsocket and a host microcontroller. Itis designed to comply with all of theavailable electrical standards forsmart card interfacing.

This issue offers a variety of DesignIdeas, including a PolyPhase™ DC/DCconverter that combines power frommultiple inputs, an isolated RS485transceiver, a sine wave to squarewave converter using the LT1719 com-parator and a tiny backlight power

LTC in the News…On October 12, 1999, Linear

Technology Corporation announ-ced its financial results for the firstquarter of fiscal year 2000. RobertH. Swanson, Chairman and CEO,stated, “Although the summerquarter historically has minimumgrowth, this was a strong quarterfor us as demand from ourcustomers continued strong,increasing in all major markets.”The Company reported sales of$147,531,000 (a 5% increase oversales for the previous quarter) andnet income of $58,457,000 com-pared with $44,382,000 a year ago.Net sales were up 27% over lastyear.

Immediately after first quarterearnings were released to the press,Linear Technology Chairman andCEO Robert H. Swanson wasinterviewed live on CNNfn’s DigitalJam by commentator BruceFrancis. The interview focused onLinear’s earnings and the forcesdriving the analog market. DigitalJam is received nationally in over12,000,000 households.

The Company was featured inthe New York Times in an articleentitled “Analog’s Success Stories.”Linear Technology was touted as a“pure play” analog company that isan apparent paradox of the digitalrevolution. As Jill Hauser of T.Rowe Price observed in the story,“if anything, the digital phenom-enon has increased demand, it hasdriven analog.”

Barron’s recently speculated inan article that Linear Technologymight soon become one of the S&P500 Index companies. The S&P isthe most widely used benchmarkfor professional investors.

supply for palmtop devices, plus thethird in a series of articles on design-ing filters with added stopbandnotches using the LTC1562 Opera-tional Filter™ IC.

We conclude with six New DeviceCameos.

Linear Technology Magazine • November 1999 3

DESIGN FEATURES

be under 950µV over the commercialtemperature range. This results inthe lowest offset voltage of any SOT-23 amplifier. Furthermore, unlikecompetitive amplifiers with meageropen-loop voltage gains of 20V/mV orless, the LT1782/LT1783 have a guar-anteed voltage gain of 200V/mV intoa 10k load.

Finally, to optimize the outputstage, nitride capacitors were addedto the process. This halves the area ofthe internal compensation capacitorsand allows small die size with excel-lent frequency stability. In fact, theLT1782/LT1783 are stable withcapacitive loads up to 500pF underall load conditions. The minimum

output stage current is ±18mA andthe output swing is guaranteed within8mV of ground and 90mV of the posi-tive rail with no load. A problemencountered with other op amps insome applications is that as the out-put approaches the rail or ground,the gain degrades. The data sheettypically claims the output can swingto within a few millivolts of the rail,but the input overdrive required toachieve this can be quite high. This isnot the case with the LT1782/LT1783;a few millivolts of input overdrive isenough to swing the outputs to theirguaranteed value. Figure 1 shows thetypical output saturation voltage vsinput overdrive.

retemaraP 2871TL 3871TLegnaRegatloVylppuS V81otV7.2 V81otV7.2

tnerruCylppuS Aµ55 Aµ003egatloVtesffOtupnI Vµ008 Vµ008tnerruCsaiBtupnI An51 An08

,tnerruCtupnI V+ )pyt(V0= An1.0 An1.0tnerruCtesffOtupnI An2 An8

Ωk01=LR,niaGpooLnepO Vm/V002 Vm/V002RRSP Bd09 Bd09RRMC Bd09 Bd09

egnaRedoMnommoC V81otV0 V81otV0otevitaleR,woL,gniwStuptuO V– Vm8 Vm8otevitaleR,hgiH,gniwStuptuO V+ Vm09 Vm09

)pyt(etaRwelS sµ/V70.0 sµ/V24.0)pyt(tcudorPhtdiwdnaBniaG zHk002 zHM52.1

C DAOL )pyt(ytilibatS Fp005 Fp005)pyt(egatloVesioNtupnI zH√/Vn05 zH√/Vn02)pyt(tnerruCesioNtupnI zH√/Ap60.0 zH√/Ap41.0

Table 1. LT1782/LT1783 SOT-23 guaranteed performance, VS = 3V/0V or 5V/0V, TA = 25°C

100

10

1

OUTP

UT S

ATUR

ATIO

N VO

LTAG

E (m

V)

0 10 20 30 40 50 60INPUT OVERDRIVE (mV)

OUTPUTHIGH

OUTPUTLOW

LT1782

ILOAD

VOUT = 2Ω(ILOAD)0V TO 4.3V

2N3904

2k

200Ω

5V

VBATT

200Ω

0.2Ω

LOAD

–

+

Figure 1. Output saturation voltage vs inputoverdrive Figure 2. Positive-supply-rail current-sense application

Other NicetiesAttention to small details is impor-tant for universal acceptance intogeneral-purpose applications. Theparts are completely specified on 3V,5V and ±5V supplies and the op ampsoperate properly if the shutdown pinis left floating. Input-stage phase-reversal protection prevents theoutput from reversing phase whenthe input is forced up to 9V below thenegative supply. Input protectionresistors safely limit the current toless than 3mA when the inputs areforced to this extreme.

An Over-The-TopSensing ApplicationThe circuit of Figure 2 utilizes theOver-the-Top capabilities of theLT1782. The 0.2Ω resistor senses theload current while the op amp andNPN transistor form a closed loop,making the collector current of Q1proportional to the load current. The2k load resistor converts the currentinto a voltage. The positive input volt-age, VBATT, is not limited to the 5Vsupply of the op amp and could be ashigh as 18V. The LT1783 draws only0.1nA of current through the inputswhen it is powered down, extendingthe battery life.

ConclusionLinear Technology’s first SOT-23 opamps are not just space savers, theyare tiny, tough and boast a variety offeatures that all join to make theLT1782/LT1783 truly general pur-pose amplifiers. These new productswill enhance the superior line ofoperational amplifiers from LinearTechnology.


DESIGN FEATURES

Figure 1. Simplified schematic of the LT1461

4 GND1461 SS

6 VOUT

3SHDN

2 V+

R1

R2

R4

Q1

R3

Q8

Q7

Q4Q3

Q2

Q5

Q6I1

Q15

Q17

Q19

Q14 Q13

Q22Q18

Q16 J1

Q21

Q13

Q12

Q11

Q10Q9

Q24Q20

D7

D6

D5

D4 D3 R7 D2 D1

C1

R5

R6

3ppm/°C Micropower Reference DrawsOnly 50µA and Operates on 2.8V

IntroductionThe new LT1461 bandgap voltage ref-erence is a low dropout reference thathas superb temperature coefficient,tight output tolerance and low supplycurrent. In addition, high output cur-rent together with unmeasurablethermal regulation make the LT1461ideal for micropower precision regu-lator applications. To achieve thesecharacteristics, new wafer trim tech-niques were developed and extensivecharacterization of thermal hysteresisand long-term drift were performed.

How It’s DoneAt the heart of the LT1461 is thebandgap core: Q1, Q2, Q3 and Q4 ofFigure 1. Q1 and Q2 generate a ∆VBE,whereas Q3 and Q4 provide theattendant VBE. The bandgap voltageis impressed across R1, and R2 pro-vides gain for numerous voltageoptions. I1 provides patented curva-ture compensation that modifies the∆VBE current and greatly improvesthe temperature coefficient. High out-put current and excellent loadregulation are the result of carefullayout techniques and four betas ofcurrent gain from Q5 through Q8.The LT1461 has a shutdown control

that can be used to turn off the refer-ence during high output currentconditions; it also has thermal shut-down or current-limit protection forthe device during overload. Table 1summarizes the performance specifi-cations of the new reference.

How It’s Really DoneIn order for the factory to trim theoutput voltage to a very tight toler-ance, four pins of the package arededicated to trimming R1. This trimallows the LT1461 output voltage to beadjusted to better than 0.02%. Thefinal specification, however, is a con-servative 0.04%, because the part ismeasured with different factory testersand a safety margin or guardband isapplied for thermal hysteresis.

The idea of this guardband is toensure that the parts will remain 0.04%accurate even after they are exposedto temperature excursions of –40°C to85°C. When a part is trimmed to highaccuracy, its output voltage is validonly for the mechanical stress condi-tions that are present at the time oftrim. The amount of stress will changewith temperature because the thermalcoefficient of expansion is different

between the plastic package and thesilicon chip. When the part returns toits “trimmed” temperature, there is noguarantee that the stress returns toexactly the initial amount, and theoutput voltage will be slightly differ-ent. This difference is called “thermallyinduced hysteresis shift” or “thermalhysteresis” and is expressed in partsper million (ppm). Figure 2 shows adistribution plot of thermally inducedhysteresis shift on parts that werecycled several times between –40°Cand 85°C. The LT1461 initial accuracyis specified broadly enough to includethis hysteresis shift.

The output trim on the LT1461uses all available pins on the package,so the temperature coefficient mustbe trimmed at wafer sort. If a refer-ence has its bandgap voltage trimmedto the proper target or “bogie,” it willhave a near zero temperature drift.The problem is that the bogie moveswith process variations and can differfrom die to die. The solution is tomeasure the temperature coefficientat wafer sort and use an algorithm tocorrect the bandgap voltage. Thisrequires wafer sorts at 75°C and 25°Cto establish the drift. For example, ifthe bandgap voltage is trimmed to1.2000V at 75°C and it moves 300µ Vto 1.2003V at 25°C, this correspondsto a –5ppm/°C drift. Once the TC isknown, the bandgap voltage can eas-ily be trimmed for zero TC by adjustingR3. The TC distribution widens whenthe parts are assembled in plasticbecause of stress on Q3 and Q4.

What the User KnowsUsers encounter several problemswhen applying precision referencesand again thermal hysteresis is frontand center. When a reference is sol-dered into a PC board, the elevatedtemperature and subsequent cooling

by John Wright


DESIGN FEATURES

Figure 2. –40°C to 85°C hysteresisFigure 3. Typical distribution of outputvoltage shift after soldering onto PC board

retemaraP snoitidnoC niM pyT xaM stinU

egatloVtuptuO

A1641TL 40.0– ——— 40.0

%B1641TL 60.0– ——— 60.0

C1641TL 80.0– ——— 80.0

D1641TL 51.0– ——— 51.0

egatloVtuptuOneiciffeoCerutarepmeT t

A1641TL ——— ——— 3

C°/mppB1641TL ——— ——— 7

C1641TL ——— ——— 12D1641TL

C°521otC°04– ——— ——— 02

noitalugeRdaoL gnicruoSAm05otAm0 ——— 21 03 Am/mpp

egatloVtuoporD Am1gnicruoS ——— 31.0 3.0 V

tnerruCylppuS daoLoN ——— 53 05 Aµ

esioNegatloVtuptuO zH01≤f≤zH1.0 ——— 8 ——— mpp P-P

fotfirDmreT-gnoLegatloVtuptuO ——— ——— 06 ——— rHk√/mpp

siseretsyHlamrehT C°58otC°04– ——— 56 ——— mpp

Table 1. LT1461 performance, VIN = VOUT + 0.5V

OUTPUT VOLTAGE SHIFT (ppm)

NUM

BER

OF U

NITS

12

10

8

6

4

2

0–300 –200 –100 0 100 200 300

HYSTERESIS (ppm)–100

NUM

BER

OF U

NITS

12

16

20WORST-CASE HYSTERESISON 35 PIECES

1461 G17

8

4

10

14

18

6

2

0–80 –60 –40 –20 0 20 40 60 80 100

–40°C TO 25°C

85°C TO 25°C

cause stress that is very differentfrom stress that is caused by auto-matic testers at the LTC factory.Additionally, there is now an unre-lieved mechanical bias on theleadframe when the solder cools. Fig-ure 3 shows the SO-8 LT1461 outputshift of about –100ppm after IR sol-dering onto a PC board. After 336hours, as the stress relaxes, the out-put voltage typically shifts about45ppm back toward the initial statewhere the device was factory trimmed.

Another type of stress is caused ifa PC board is flexed, for examplewhen held in a card cage. The stresson the board is transmitted directly to

the IC package. A simply way to reducethe stress-related shifts is to mountthe reference near the short edge ofthe PC board or in a corner. The boardedge acts as a stress boundary, or aregion where the flexure of the boardis minimum. The package should bemounted so that the leads absorb thestress and not the package. (See “Un-derstanding and Applying VoltageReferences,” in Linear TechnologyVII:2 and VII:3, June and August,1997, for more information on theeffects of stress on voltage referenceperformance and techniques for miti-gating it.)

Long-Term DriftSome manufactures are now toutingphenomenal long-term drift specifi-cations. Long-term drift cannot beextrapolated from accelerated hightemperature testing. This erroneoustechnique gives drift numbers thatare wildly optimistic. The only waylong-term drift can be measured isover the time interval of interest. Theerroneous technique uses theArrhenius Equation to derive anacceleration factor from elevated tem-perature readings. The equation is:

AF = eEA

K1

T11

T2( (–•

where: EA = Activation Energy (as-sume 0.7)K = Boltzmann’s ConstantT2 = Test Condition Temperature inKelvin

T1 = Use Condition Temperature inKelvin

To show how absurd this tech-nique is, compare the LT1461 data.Typical 1000hr long-term drift at 30°C= 60ppm. The typical 1000hr long-term drift at 130°C = 120ppm. Fromthe Arrhenius Equation the accelera-tion factor is:

AF = e0.7

0.00008631

3031

403( (–•= 767

The erroneous projected long-termdrift is:

120ppm/767 = 0.156ppm/1000hr at 30°C

For a 2.5V reference, this corre-sponds to a 0.39µV shift after 1000 hr.

continued on page 36


DESIGN FEATURES

Smart Battery Charger IsProgrammed via the SMBusIntroductionSmart Batteries are becoming preva-lent in the laptop computer worldbecause they offer an industry-stan-dard, high accuracy “gas gauge”system. These batteries conform to aset of specifications that define theoperation of all of the components ina Smart Battery powered System(SBS). The battery has an embeddedcontroller that tracks informationrelated to battery charging and use.This information is provided to thesystem via a serial, 2-wire SMBusinterface, a variant of the I2C™ bus inwide use today. The battery can bequeried for information on remainingcapacity, total capacity, time remain-ing at current rate of discharge,discharge current, terminal voltageand so on. Since most Smart Batter-ies can become a master on the bus,the battery can control the SmartBattery Charger for optimal charging.The LTC1759 Smart Battery ChargerIC is designed to be controlled by thistype of Smart Battery. In addition, asafety signal provided by the batteryindicates whether the battery ispresent in the system and warns ofpossible thermal problems or batteryfaults if other systems fail. Theemphasis of the SBS is on safety, easeof use and compatibility.

There are two types of Smart Bat-tery Chargers (SBCs) allowed by theSBS specifications. A Level 2 charger,such as the LTC1759, is a slave onthe SMBus and responds to com-mands from the battery to controlcharging. A Level 3 charger can beeither a slave or a master on theSMBus, since it can query the batteryto determine charging information.The SBC is independent of battery-chemistry type. It provides chargingcurrent and charging voltage inresponse to commands from the bat-tery. Charge termination is sent bythe battery as either zero current or

zero voltage or as “terminate charge”alarm. Charging will also terminate ifthe safety signal indicates that thebattery is not present or the battery istoo hot to charge safely.

The LTC1759 is a complete Level 2Smart Battery Charger. It is able toautonomously charge a Smart Bat-tery by receiving and interpretingcommands over its built-in SMBusinterface. The LTC1759 adheres to allthe safety requirements of the SmartBattery Charger Specification, includ-ing 3-minute timers that protect fromSMBus communication failures andovercharging of Li-Ion batteries dur-ing wake-up mode—features absentfrom some competing solutions. Hard-ware-programmable current andvoltage limits provide an additionallevel of protection that cannot bealtered by errant software.

The LTC1759 manages all the com-plexities of a Smart Battery ChargerSystem. This is appealing to thosewho wish to support Smart Batterieswithout getting involved in all thedetails. SBC compliance, safety,output voltage accuracy, SMBusaccelerators and LTC’s patented walladapter current limiting are just a fewof the features that make this anoutstanding part.

LTC1759 Smart BatteryCharger FeaturesThe LTC1759 merges the intelligenceof a Smart Battery Charger with aconstant-current (CC), constant-volt-age (CV), current mode switchingbattery charger circuit. The LTC1759incorporates the following features: 0.5% output voltage accuracy at

room temperature, 1% overtemperature range

5% output current regulation An external, resistor-program-

mable voltage limit, with fourranges that support stacking ofthe popular 4.2V battery cell

An SMBus programmable outputvoltage, from 2.465V to 21V ineither 16mV or 32mV granularity,depending upon the programmedvoltage range (10-bit resolution)

An external, resistor-program-mable current limit with fourlimits: 1A, 2A, 4A and 8A

An SMBus programmable outputcurrent with 10-bit resolutionover all ranges

LTC’s patented programmable ACwall adapter current limiting tomaximize charge rate

Low VIN-to-VOUT operation(dropout < 0.5V)

95% efficiency Compliant with Smart Battery

Charger Specification Rev. 1.0,Level 2

Low power consumption when ACis not present, while remainingcompliant with all Smart BatteryCharger requirements for statusand interrupts

Built-in SMBus accelerators(similar to the LTC1694)

New 36-pin narrow SSOPpackage (0.209˝ wide)

Circuit DescriptionThe LTC1759 is composed of a syn-chronous, current mode, PWMstep-down (buck) switcher controller,a charger controller, two 10-bit DACsto control charger parameters, athermistor Safety Signal decoder,hardware voltage and current limitdecoders and an SMBus controllerblock (refer to Figure 1).

The Smart Battery or systemcontroller programs both constant-current (CC) and constant-voltage (CV)limit values though commands overthe SMBus interface. The buck con-verter uses N-channel MOSFETs forswitches, allowing low cost, highefficiency operation. It also providesreverse battery discharge protectionand ultralow dropout operation. A

by Mark Gurries

I2C is a trademark of Philips Electronics N.V.


DESIGN FEATURES

thermistor safety-detection circuitisused to detect the presence of a bat-tery and determine whether the tem-perature of the battery allows safecharging to occur. Linear Technology’spatented input current limiting fea-ture is implemented, allowing thefastest battery charge times withoutoverloading the wall adapter.

When a constant current value isreceived via an SMBus transmission,it is scaled and limited to a valuebelow that programmed by the RILIMITresistor. This modified value programsthe current DAC, setting the DC charg-ing current. The current DAC is a

10-bit delta-sigma DAC that sinkscurrent from the PROG pin whencharging current is desired (refer toFigure 2). Amplifier CA1 senses thevoltage drop across RSENSE and forcesthis voltage across RS2 (200Ω); thecurrent through RS2 is sent through acurrent mirror as a pull-up currenton the PROG pin. The matching ofcurrent through RS2 with current fromthe PROG pin by CA2 implementsconstant-current operation. Since thedelta-sigma DAC output is a series ofpulses, a smoothing capacitor isneeded to filter the pulses into DC.

When a constant-voltage value isreceived via an SMBus transmission,the value is scaled, adjusted to canceloffset and limited to a value belowthat programmed by the RVLIMIT resis-tor. This modified value programs thevoltage DAC, setting the DC chargingvoltage. The voltage DAC drives thebottom of an internal voltage dividernetwork. The top of the voltage divideris connected directly to the batteryoutput though the BAT2 pin. A volt-age error amplifier, VA, compares thedivided battery voltage on the VSETpin with an internal, precision refer-ence voltage. The output of the VAamp is configured as a current sourcethat can drive the PROG pin. ThePROG pin is a current summing nodefor both current and voltage feedbackloops. The VA loop steals control ofthe current feedback loop when thebattery voltage exceeds the pro-grammed voltage, forcing the chargingcurrent down to the level required tomaintain the programmed voltage.Since the ∆Σ DAC output is in theform of a series of pulses, a smooth-ing network is needed to filter thepulses into DC at the VSET pin. Thecapacitors C5 and C4 form a capaci-tance divider that provides somefiltering of the feedback voltage fromthe battery while filtering the DACpulses.

The LTC1759 requires two powersupplies. The PWM circuitry runsdirectly off the wall adapter supplythrough the VCC pin, whereas thelogic functions run independentlyfrom the VDD supply. This allows thePWM circuitry to go into 40µ A micro-power shutdown mode when AC poweris removed, allowing the logic andSMBus activity to remain alive, asrequired by Intel’s ACPI standards.This separate supply also allows thelogic and SMBus to run at 3V or 5Vdepending on the system designer’sneeds. To minimize power draw of theLTC1759 logic, the logic circuits aredriven by a clock circuit that shutsdown when there is no activity andwakes up to service SMBus activity orto generate interrupts. Once therequest is serviced, the LTC1759 goesback to sleep.

+

+

–

+

+

7UV

4SYNC

6AGND

27VC

VDD

10µA

9CLP

10CLN

11COMP1

12CHGEN

19THERM

20RNR

15SCL

14SDA

18DGND

13

13INTB

VREF1k

VREF

20k

290k

812.5k

8 INFET

8V

34 GBIAS

35 BGATE

36

33

PGND

BOOSTC

30 SPIN

29 SENSE

28 PROG75k

21 DCDIV

22 DCIN

23 BAT2

VSET

BAT1

BAT1

1.3V

92mV

VCC

VCC

32

31

SDB

+

6.7V 1.2V

1V

8.9V

65k 612k

72k

ONESHOT

200kHzOSC

PWMLOGIC

SLOPE COMP

C1

+

CL1

+

AC_PRESENT

PWR_FAIL

+B1

+CA2

+VA

S

RQ

1 BOOST

2 TGATE

3 SW

+

CA1

+

0.2V

+

26

ILIMIT24

VLIMIT25

ISET17

VDD16

10-BITVOLTAGE

DAC

LIMITDECODER

CHARGERCONTROLLER

THERMISTORDECODER

SMBusCONTROLLER 10-BIT

CURRENTDAC

5–

–

–

–

–

–

–

SHDN

–

–

– –

Figure 1. LTC1759 block diagram


DESIGN FEATURES

Shutdown of the PWM through theCHGEN–SDB pin combination occurswhen the AC power is lost or thebattery is removed. The LTC1759detects the AC loss through the DCDIVpin. This threshold is usually set justbelow the lowest valid voltage of thewall adapter. AC power status may beread by the system over the SMBus.The UV pin is only used to put thePWM circuitry into micropower shut-down and is connected directly to thewall adapter supply.

Inductor selection is not criticalwith the design, since the loopresponse of the charger is intention-ally set to be very slow. Almost anyvalue will work, with a practical lowerlimit of about 15µ H. Lower induc-tance will create higher ripplecurrents, requiring a lower ESRcapacitor on the output. It will alsocause cosmetically ugly discontinu-ous switching operation to occur athigher currents than necessary.

Output capacitor selection is notESR critical but must be able to handleall of the ripple current from thecharger. Do not count on the batteryto carry the ripple current becausethe effective impedance as seen by

the charger can be much greater thanthe ESR of the capacitor. Many batterypacks have built-in series-protectionMOSFETs that raise the ESR of thebattery. There may also be optionalpower-routing MOSFETs in serieswith the battery in multiple-batteryconfigurations, further increasing thebattery ESR. From the charger pointof view, the output capacitor ESR canbe as high as 1Ω, allowing a widerange of capacitor options. Whenusing a resistive or electronic load,some instability may occur. This canbe fixed by adding a temporary 300Ωresistor in series with the PROG pincapacitor or putting a 10µF capacitoron the output. Avoid using ceramiccapacitors in the output because theytend to make noise when the switchergoes discontinuous and starts to dropcycles at audible frequencies undervery light load currents—use tan-talums instead. Input capacitanceselection is driven by the input ripplecurrent of the charger, which is usu-ally 1/2 of the maximum outputcurrent. For a 4A charger, a 22µF,50V ceramic is recommended, sincethis part can typically handle 2A ofripple current. It also takes up the

least amount of space and can costless than other capacitor options.

Current protection, from battery towall adapter, is provided by aP-channel MOSFET (Q1). A voltagecomparator monitors the voltageacross the MOSFET and will turn itoff when the wall adapter drops toless than 200mV above the batteryvoltage. Although an inexpensivediode could be used instead of thisMOSFET, the MOSFET only adds100mV to the already low 0.4V drop-out mode of operation withoutproducing extra heat. During start-up without a battery, the MOSFETparasitic diode is used to allow walladapter power to reach the VCC pinand power up the PWM controlcircuitry.

Primary compensation is done onthe PROG pin; however, DAC pulsefilter requirements determine theeffective value of the capacitor. Pulseripple current must be less than 20mVor loop jitter will occur, giving theappearance of loop instability at lightcharging currents. The VC pincapacitor’s primary function is to pro-vide soft-start support. There mustalways be a resistor of 1.5k in series

UV

VDD

SYNC

SDB

CHGEN

VLIMIT

ILIMIT

DGND

ISET

PROG

VC

COMP1

AGND

RNR

THERM

SDA

SCL

INTB

22

21

8

32

9

10

2

33

34

1

3

35

30

29

31

23

26

36

RSET, 3.83k

R4, 1.5k

LTC1759

R7, 1k

RUR1k

R3499Ω

RWEAK475k

RNR10k

C9

0.1µF

C13, 0.33µF

VDD

VDD3.3V OR 5V

C11, 1µF

C12, 0.68µF

RVLIMIT, 33k

RCL, 0.033Ω

RS1, 200Ω

R668Ω

RS2, 200Ω

R115.8k

R21k

C20.47µF

C5, 2.2µF

C60.68µF

C80.047µF

C4, 0.1µF

C11µF

Q1

Q3 D1

Q2 L115µH

C1622µF

SYSTEMPOWER

RSENSE0.025Ω

D2 D2

RILIMIT, 33k

7

16

4

5

12

25

24

18

17

28

27

11

6

20

19

14

15

13

DCIN

DCDIV

INFET

VCC

CLP

CLN

TGATE

BOOSTC

GBIAS

BOOST

SW

BGATE

SPIN

SENSE

BAT1

BAT2

VSET

PGND C70.015µF

C322µF

C140.1µF

C1522µF50VAl

ACADAPTER

INPUT≥17VDC

SMARTBATTERY

INTB SMBusTOHOST

D1: MBRS130LT3D2: FMMD7000L1: SUMIDA CDRH127-150

Q1: Si3457DVQ2, Q3: Si3456DV

SCLSDA

+

+

Figure 2. A complete 4A Smart Battery Charger


DESIGN FEATURES

with the VC pin capacitor to allowproper shutdown.

From a thermal standpoint, theoutput voltage remains approximately0.5% accurate over the battery tem-perature charging range. This higherprecision allows a higher chargecapacity in the battery, and, moreimportantly, will cause fewer prob-lems with voltage-based chargetermination circuitry in the battery.

SMB AlertThe SBS standards allow for the optionof an open-collector interrupt line tonotify the host when a critical powerevent has occurred. This feature iscalled SMBALERT#. The LTC1759implements this feature by assertingthe INTB line low when AC power islost or restored and when a battery isphysically installed or removed. INTBis cleared when the host reads theLTC1759 status register or performsa successful read of the SMBALERT#Response address of the LTC1759.

Setting Safe Voltageand Current RangesThe LTC1759 voltage/current rangesare programmed with two externalresistors, RVLIMIT and RILIMIT, as shownin Tables 1 and 2. These limits preventcommunication errors or errant soft-ware from causing the charger todamage the battery. At the same time,the variable granularity allows forbetter control of voltage and current

in the lower ranges. The voltage limitsare ROM mask programmable.

SMBus AccelerationUnlike the I2C bus, which allows theuse of variable pull-up currents onthe bus signals, the SMBus pull-upcurrent is specified as a maximum of350µ A. In larger systems, the capaci-tance load on the SMBus can causerise-time violations (TRISE > 1µ s),which could result in a communica-tion failure. This is especially the casewhen I2C devices are mixed withSMBus-compliant devices on the samebus. The thresholds of the I2C busreceivers are generally higher thantheir SMBus cousins and are moresensitive to slow rise times.

Both SCL and SDA have dynamicpull-up circuits that improve the risetime on systems with significantcapacitance on the two SMBus sig-nals. The dynamic pull-up circuitrydetects a rising edge on SDA or SCLand applies 2mA–5mA pull-up to VDDfor approximately 1µs (Figure 3). Thisaction allows the bus to meet SMBusrise-time requirements with as muchas 150pF on each SMBus signal. Theimproved rise time will benefit all ofthe devices that use the SMBus line,especially devices that use the I2Clogic levels.

AC Adapter Current LimitingWall adapters are typically AC/DCconverters with 20V output at 3A–4Aof load current. When a notebook isrunning, all of the available currentfrom the wall adapter may beconsumed by the system, leaving nopower for charging the battery. How-ever, as soon as the system’s powerrequirements drop below the walladapter’s current limit, battery charg-ing can resume. In order to rechargethe battery in the shortest time pos-sible, the recharging should start assoon as there is any current leftoverfrom the system. The ideal situationis when the sum of battery chargingcurrent and the system current isjust below the wall adapter’s currentlimit. The LTC1759 incorporates apatented battery charger input cur-rent-limiting function that allows thecharger current to be automatically

WITHOUTACCELERATOR

WITHACCELERATOR

R TIMIIL egnaRtnerruCgnigrahClanimoN ytiralunarG

0Ω Am3201<I<0 Am1

k01 Am6402<I<0 Am2

k33 Am2904<I<0 Am4

Votdetrohsro)k052>(nepO DD Am4818<I<0 Am8

Table 1. ILIMIT trip points and ranges

R TIMIVL V(egatloVgnigrahClanimoN TUO egnaR) ytiralunarG

0 V<5642 TUO Vm2348< Vm61

k01 V<5642 TUO Vm046,21< Vm61

k33 V<5642 TUO Vm468,61< Vm23

k001 V<5642 TUO Vm650,12< Vm23

VotdeitronepO DD V<5642 TUO Vm867,23< Vm23

Table 2. VLIMIT trip points and ranges

Figure 3. SMBus accelerator operation (RPULLUP = 15k, CL =150pF, VDD = 5V)


DESIGN FEATURES

ecnatsiseRlangiSytefaS stiBsutatSregrahC noitpircseD

0 –Ω 05 0Ω1=RU_YTEFAS1=TOH_YTEFAS

1=TNESERP_YRETTABegnarrednU

05 0 –Ω k3 1=TOH_YTEFAS1=TNESERP_YRETTAB toH

k03–k3 raelCstiBytefaSllA1=TNESERP_YRETTAB laedI

k001–k03 1=DLOC_YTEFAS1=TNESERP_YRETTAB dloC

k001>1=RO_YTEFAS

1=DLOC_YTEFAS0=TNESERP_YRETTAB

egnarrevO

Table 3. Safety signal resistance ranges reduced to avoid overloading the walladapter, yet still charge the batterywith the maximum available current.

ImprovedSafety Signal SensingThe Safety Signal in most Smart Bat-teries is a resistor or thermistor to thebattery’s negative terminal. The SBCmust sense the resistance of the SafetySignal to ground and determine if thebattery is connected and whether it issafe to charge. The SBC must reportthe status of the Safety Signal duringan SMBus read of the ChargerStatus()register. Table 3 shows the five rangesof resistance and what the Char-gerStatus() bits must indicate.

The LTC1759 monitors the safetysignal using a state machine to con-trol the thermistor sensing scheme ofFigure 4. This approach allows theLTC1759 to conserve power whilesupporting battery-presence detec-tion and safety signal reporting whenAC is not present. It also provideshigh noise immunity at the under-range-to-hot trip point.

The state machine sequentiallyswitches RWEAK, RNR and RUR to pull-up against the battery’s internalthermistor. The resulting voltage ismonitored by the comparators andused to determine the thermistor’soperating range. The state machine isable to sample the safety signal withall three resistors in 100µ s. Thisallows the thermistor to be read dur-ing an SMBus read requesting SafetySignal status and then shut down toconserve power. A system using afixed 10k pullup for all ranges willwaste current when AC is not present.RWEAK is used to continuously moni-tor battery presence; it uses very littlecurrent and allows detection of theinsertion or removal of a batteryregardless of whether or not AC ispresent. RNR is used to determine ifthe safety range is cold or ideal. RUR isused to determine if the safety rangeis hot or underrange. The testing ofRTHERM is shown for a cold and under-range thermistor in Figures 5 and 6,respectively. When AC is present, thestate machine continuously tests the

RTHERM IS NOT TESTED WITH RUR SINCE ITTESTED COLD

TESTING RTHERM = 33kWITH RWEAK = 475k

TESTING RTHERM = 33kWITH RNR = 10k

Figure 5. Testing a cold thermistor

VDDVDD

RNR

THERM

HYSTERESIS

RWEAK475k1%

RTHERMTOTAL

PARASITICCAPACITANCE

MUST BE LESSTHAN 75pF

RNR10k1%

RNR_SELB

RUR1k1%

VDD

VDD

SAFETY_COLD

SAFETY_UR

SAFETY_HOT

SAFETY_OR

RUR_SELB

+

–

+

–

+

–

+

–

THERMLATCH

COLD

HOT

OR

UR

LTC1759

Figure 4. LTC1759 safety-signal-monitoring circuitry



DESIGN FEATURES

LTC1755 Smart Card InterfaceProvides Inductorless Boostand Signal-Level TranslatorsIntroductionAlready common in Europe and someof the Far East, smart cards may soonreplace magnetic stripe cards in theU.S. The LTC1755 provides a simpleand complete solution to smart cardinterfacing. Requiring only two bypasscapacitors and one charge pumpcapacitor, the LTC1755 interfacesseamlessly between a smart cardsocket and a host microcontroller. Itis designed to comply with all of theavailable electrical standards forsmart card interfacing. Figure 1 showsthe LTC1755 in a typical smart cardapplication.

Figure 2 shows the block diagramof the LTC1755. An internal powermanagement unit delivers a select-able 3V or 5V regulated output voltageto the smart card. Two unidirectionaland three bidirectional communica-tion channels provide the signaltranslation necessary to interface froma microcontroller at one supply volt-age to a smart card at another supplyvoltage. A smart card detection chan-nel observes the state of a mechanicalswitch and delivers the informationto the microcontroller after an appro-priate debounce period. Finally, the

LTC1755 provides all fault detectionnecessary to comply with both theEMV and ISO-7816-3 smart cardstandards. These includeshort-circuit detection,smart card removal during atransaction and undervolt-age and overtemperaturefaults. In the event of a faultcondition, the smart card isproperly deactivated and analarm output notifies themicrocontroller of the fault.

PowerManagement UnitUnlike solutions that requirean external inductor andcurrent sense resistor togenerate power to the card,the power management sec-tion of the LTC1755 requiresonly a small flying capacitorto provide step-up capability.Sense circuitry determineshow much input voltage isava i lab le and dec ideswhether to step the inputvoltage up or down to pro-vide the required output

voltage to the smart card. For ex-ample, if the input supply voltage is3.3V and the required smart card

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

LTC1755

PRES

PWR

CS

NC/NO

GND

VIN

VCC

AUX1

AUX2

I/O

RST

CLK

C210µFC3

10µF

VCC

AUX1

AUX2

I/O

RST

CLK

C10.68µFGND

SMART CARD

SMART CARDPRESENT SWITCH

µCONTROLLER

3.3V

5V/3V

CARD

ALARM

READY

DVCC

C–

C+

AUX1IN

AUX2IN

DATA

RIN

CIN

*

*

*

*

*

*

DVCC

PRES 1

PWR 2

τ

DC/DC CONVERTERAND

CONTROL LOGIC

CS 3

NC/NO 4

GND 5

VIN 6

VCC 7

AUX1 8

AUX2 9

I/O 10

RST 11

CLK

*DYNAMIC PULL-UP CURRENT SOURCE

12

5V/3V

CARD

ALARM

READY

DVCC

C–

C+

AUX1IN

AUX2IN

DATA15

RIN14

CIN

18

17

16

23

22

21

20

19

24

13

Figure 1. LTC1755 typical application

Figure 2. LTC1755 block diagram

voltage is 5V, the LTC1755 will oper-ate as a charge pump to deliver thehigher voltage; if the input supplyvoltage is 5V and the required smartcard voltage is 3V, it will automati-cally step down to provide the correctoutput voltage.

The entire LTC1755, including thepower management circuitry, isdesigned to consume low power underlight or no load conditions. This canresult in considerable power savingsfor battery-powered applications. Fur-thermore, the shutdown current isonly several microamperes.

by Steven Martin


DESIGN FEATURES

To prevent high inrush currentduring turn-on, an automatic soft-start feature increases the supplyvoltage of the smart card at a fixedrate. This is particularly importantwhen the LTC1755 is in step-up modebecause the input current will betwice the output current. With a 10µFoutput capacitor, the rise time ofapproximately 2ms limits the inputcurrent to 50mA, thus preventingstart-up problems. The READY pintells the microcontroller when theoutput voltage has reached its finalvalue. This signal also enables thecommunication channels, therebyensuring proper compliance withsmart card standards. Figure 3 showsthe card supply voltage ramp as wellas the READY pin indicating that theoutput has reached its final state.

During smart card deactivation,either by direct user control or byautomatic fault deactivation, theLTC1755 discharges the smart cardsupply pin in under 250µs. Rapiddischarge is important to ensure thatthe card’s supply is completelyremoved in the event of smart cardremoval during a transaction. Thisrequirement is specified in varioussmart card standards.

BidirectionalCommunication ChannelsThere are three bidirectional chan-nels for communicating with the smartcard. These channels, which are open-drain I2C™ style, provide level

translation, direction arbitration andshort-circuit protection. Unlike ana-log approaches, the LTC1755 usescontrol logic with active pull-up andpull-down devices on both sides ofthe channel. This allows the requiredsource and sink currents to beachieved independent of the inputvoltage on the transmitting side of thechannel. The direction-control logicarbitrates which side of the channelis the talker and which side is thelistener. Upon receipt of a low on oneside of the channel, that side becomesthe talker and the other side becomesthe listener. Transmission in theopposite direction is instantly blockedto prevent the channel from latching.Once the talker side of the channel isrelinquished, both sides return highand either side is a candidate tobecome the next talker.

To meet the stringent rise-timerequirements imposed by ISO-7816-3 while keeping power dissipationand VOL to a minimum, an acceleratorcircuit (see Figure 4) is built into eachpull-up current source on the bidi-rectional channels. Normally, a smallcurrent, ISTART, pulls each bidirec-tional pin to its respective powersupply rail. An open-drain transistorcan easily overcome ISTART whenevera low is asserted. When the low isrelinquished, ISTART slowly begins tocharge the pin toward its rail again.An internal edge-rate-detection com-parator notices that the node is movingupward and fires a large pull-up cur-

rent source to assist. Once the largercurrent source begins to enhance theedge rate of the node, the decision toenhance is reinforced, thereby effect-ing a dynamic form of hysteresis.After the node has reached the powersupply rail, the comparator resetsand only ISTART is available again.Figure 5 shows the waveform of abidirectional pin. The 10% to 90%rise time is on the order of 150ns.

UnidirectionalCommunication ChannelsThere are two unidirectional chan-nels on the LTC1755 that provide thelevel-shifted clock and reset signalsused by the smart card for synchroni-zation. The clock channel is designedspecifically for high speed and canfaithfully transmit a 5MHz signal.Both of these channels are disabledand provide a valid low before thesmart card supply voltage has reachedits final value. Once the card supplyvoltage is valid, these channels willsimply transmit the signals present

500µs/DIV

READY2V/DIV

CARD SUPPLYVOLTAGE

1V/DIV

100ns/DIV

BIDIRECTIONALPIN

500mV/DIV

–

+

δVδt

ISTART

VREF

BIDIRECTIONAL PIN

Figure 3. Smart card supply voltage and READY upon activation Figure 5. Bidirectional pin with dynamic pull-up

Figure 4. Dynamic pull-up current source


DESIGN FEATURES

at their respective inputs. To complywith smart card standards, the RSTpin is always brought low before theCLK pin upon deactivation.

Smart CardDetection ChannelThe LTC1755 incorporates the onlycard detection solution that does notrequire additional de-bounce circuitryor software. This channel detects thepresence of a smart card by forcing asmall current and monitoring the volt-age on a mechanical detection switch.Once a smart card is detected, thechannel starts the debounce timer.The presence of a card is reported tothe microcontroller only if the cardhas been present for a minimum of40ms. Existing solutions provideeither no debounce capability or mini-mal (only tens of microseconds)debounce time. These solutionsrequire additional software or hard-ware to mask out the transientsassociated with the physical inser-tion of the smart card. Also, unlikeother solutions, the switch-sense cur-rent is generated by the LTC1755 sono external components are required.Once a valid card indication occurs,the channel alerts the microcontrol-ler by asserting the CARD pin.

For maximum flexibility the smartcard detection channel can be pro-grammed to respond to either anormally open or normally closedswitch. A built-in XOR gate is used asa controlled inverter to provide thisfunction.

Fault Detectionand AvoidanceSpecifications relating to faults onthe smart card pins are very strin-gent. For example, ISO7816-3 (section1.4.8) specifies that the smart cardsocket must be capable of surviving a“metal plate” connection between anyor all contacts without damage. Toaccommodate these fault conditions,the LTC1755 uses voltage sensing onthe low impedance pins to detect ifthey are being forced to an inappro-priate level. For example, the voltageon the smart card supply pin, VCC, iscompared with an internal referenceto determine if a short circuit exists.If a fault persists for a prescribedperiod, the LTC1755 automaticallydeactivates the smart card and assertsthe ALARM output. The small timeoutperiod prevents false errors fromplaguing the microcontroller. Theclock and reset channels respond tofaults in a similar way. The digitallevels on the outputs of these chan-nels (CLK and RST) are compared tothose being presented at their inputs.If these signals differ for severalmicroseconds, a fault is declared andthe smart card is deactivated. Again,the ALARM output alerts the micro-controller that an electrical faultexists. In both cases, since the smartcard becomes deactivated, there is nopower available to deliver excessivecurrent for a prolonged period.

The three bidirectional pins on thesmart card side of the channel areprotected against short circuits to the

smart card supply voltage by meansof a constant-current pull-down out-put. Rather than a simple pull-downtransistor to transmit a low to thesmart card, these channels use acurrent source implementation. The3.5mA current source providesenough current to meet the edge rateand VOL requirements while limitingthe current available during a fault.The available smart card standardsspecify that no more than 5mA flowduring faults on these pins. Of course,short circuits to ground on these chan-nels are indistinguishable from anormal signal and must be detectedby the data-error checking routines.

ConclusionThe LTC1755, designed specificallyfor smart card applications, providesall of the necessary level shifting andpower circuitry to interface with asmart card socket. To further reduceboard level complexity, it includes asmart card detection channel withbuilt-in debounce circuitry. Since theLTC1755 provides all of the neces-sary smart card interface functions,only bypass capacitors and one chargepump capacitor are required foroperation. Under most circumstancesthe operation of the LTC1755 is simpleand provides a nearly transparentpath to the smart card. However, whenan electrical error condition occursthe LTC1755 responds quickly bypowering down the smart card andalerting the microcontroller.

http://www.linear-tech.com/ezone/zone.htmlArticles, Design Ideas, Tips from the Lab…


DESIGN FEATURES

LT1306: Synchronous BoostDC/DC Converter DisconnectsOutput in Shutdown by Bing Fong Ma

IntroductionStep-up or boost DC/DC converterstraditionally suffer from a lack of trueshutdown capability. The output of aboost converter is connected to theinput through the inductor and diode;when the device is powered down, theload is still connected to the inputsource, presenting a possible dis-charge path. Even some synchronousboost converters suffer from this limi-tation. The unique configuration ofthe LT1306’s internal 2 ampere switchand rectifier overcomes this limita-tion. When the LT1306 is shut down,the output is disconnected from theinput, eliminating the discharge path.

Additionally, the LT1306 can regu-late the output when the input voltageexceeds the output voltage. This isuseful for generating a 5V supply

from a 4-cell alkaline battery. Whenfresh, the battery voltage measuresabout 6.5V, but when depleted, thebattery voltage is only 4V. A simpleboost converter output will follow theinput voltage only when the batteryvoltage exceeds 5V, while a step-down,or buck converter will lose regulationwhen the battery voltage falls below5V. The LT1306 regulates the outputto 5V in both situations.

Lastly, the LT1306 controls inrushcurrent. A user installing a new bat-tery need not worry about high inrushcurrent as the battery initially chargesthe output capacitor. The LT1306provides a clean solution to a difficultproblem.

The LT1306 packs all these fea-tures in an SO-8 package. The

constant frequency, current modePWM device runs at 340kHz and fea-tures Burst Mode™ operation tomaintain high efficiency at light loads.No-load quiescent current is 160µA,while the device consumes just 9µAin shutdown. The device can be exter-nally synchronized to frequenciesbetween 425kHz and 500kHz.

Circuit DescriptionIn the block diagram of Figure 1, thePWM control path is shown enclosedwithin the dashed line. The free-run-ning frequency of the oscillator istrimmed to 340kHz. The main powerswitch, Q1, is turned on at the trail-ing edge of the clock pulse. Q1 isswitched off when the switch current(sensed across resistor RS) exceeds a

–

+A1gm

–

+

–

+

–

+

VC

VB

–

+

++

2

1

VIN

A4

7

FB

8S/S

4GND

5

1.235V

1.65V

UVLO

ΣRAMPCOMPENSATION

REF/BIAS

SHUTDOWNDELAY

SHDN

SYNC300kHz OSC CLK

IDLE

SW

6CAP

SQ

R

Q1

Q2

IRECT > 0

IRECT

RSA2

SENSEAMP

DCMCONTROL

OUT

RECTIFIER+VCE2

–

X1

X2

X4

X3

A5

A3

PWM CONTROL

X4

X5

3

COUT

L1

D1

C1

VIN

Figure 1. LT1306 block diagram


DESIGN FEATURES

programmed level set by the erroramplifier output, VC, and the com-pensation ramp. This is current modecontrol. The switch current limit isreached when VC clamps at 1.28V.

The error ampl ifier outputdetermines the peak switch currentrequired to regulate the output volt-age. VC is therefore a measure of theoutput power. At heavy loads, thepeak and average inductor currentare both high. The LT1306 operatesin continuous-conduction mode(CCM) as VC increases. As the loaddecreases, the average inductorcurrent moves lower with an accom-panying decrease in the peak inductorcurrent. If the inductor currentreturns to zero within each switching

cycle, the converter is said to operatein discontinuous-conduction mode(DCM). Further reduction in loadmoves VC towards its lower operatingrange.

Hysteretic comparator A3 de-termines if VC is too low for the LT1306to operate efficiently. As VC falls belowthe Burst Mode threshold, VB, com-parator A3 turns off Q1. Any energystored in the inductor is delivered tothe output through the synchronousrectifier. The LT1306 draws only160µ A from the input in this idlestate. As the output voltage droops,VC rises above the upper trip point ofA3. The LT1306 again wakes up anddelivers power to the load. If the loadremains light, the output voltage willrise and VC will fall, causing the con-verter to idle again. Power deliverytherefore occurs in bursts. The burstfrequency is dependent on the inputvoltage, the inductance, the load cur-rent and the output filter capacitance.The output voltage ripple in BurstMode operation is higher than thosein CCM and DCM operation. Burstoperation increases light loadefficiency because the higher peakswitch current characteristic of BurstMode operation allows the converterto deliver more energy in eachswitching cycle than possible withcycle-skipping DCM operation. Thus,fewer switching cycles are required to

maintain a given output. Chip supplycurrent also becomes a small fractionof the total input current.

The synchronous rectifier is repre-sented as an NPN transistor, Q2, inthe block diagram. A rectifier driver,X5, supplies variable base drive to Q2and controls the voltage across therectifier. The supply voltage for driverX5 is generated locally with the boot-strap circuit comprising D1 and C1.When switch Q1 is on, the bootstrapcapacitor C1 is charged from the in-put to the voltage VIN – VD1(ON)– VCESAT1. The charging current flowsfrom the input through D1, C1 andQ1 to ground. After Q1 is switchedoff, the node SW goes above VO by thecollector–emitter saturation voltageof Q2. D1 becomes reverse biased andthe CAP pin voltage is approximatelyVO + VIN – VD1(ON). The capacitor C1supplies the Q2 base drive. The chargeconsumed is replenished during Q1’son-interval.

MOD

E

0 VIN – 0.1V VINVO

BOOST

STEPDOWN

MOD

E

VO + 0.1VVO VIN

BOOST

STEPDOWN

LOAD CURRENT (mA)

EFFI

CIEN

CY (%

)

90

85

80

75

70

65

601 10 100 1000

VIN = 1.8V

VIN = 2.6V

VIN = 4.2VVIN = 3.6V

VO = 5V

VIN SW CAP

VC GND

FB

OUTS/S

LT1306

CIN122µF

CIN20.1µF

CP68pF

CZ68nF

R3118k

R1768k

R2249k

CO1220µF

CO2 1µF

VOUT5V/1A

L110µH

C11µF

D1

CIN1 =

CO1 =CIN2, CO2 =

L1 =

D1 =

AVX TAJC226M010(207) 282-5111AVX TPSE227M010R0100CERAMICCOILTRONICS CTX10-3(561) 241-7876MOTOROLA MMBD914LT1(800) 441-2447

SINGLE-CELL

Li-Ion

Figure 2. DC transfer characteristics of themode control comparator plotted with VO asan independent variable; VIN is consideredfixed.

Figure 3. DC transfer characteristics of themode control comparator plotted with VIN asan independent variable; VO is consideredfixed.

Figure 4. Single Li-Ion cell to 5V converter Figure 5. Efficiency of Figure 4’s circuit


DESIGN FEATURES

In boost operation, X5 drives therectifier Q2 into saturation with con-stant forced β. X5 ceases supplyingbase current to Q2 when the inductorcurrent falls to zero. If VIN is greaterthan VO, Q2 will not be driven intosaturation. Instead, the collector–emitter voltage of Q2 increases sothat the inductor voltage reversespolarity as Q1 switches. Since theinductor voltage is always bipolar,volt-second balance can be main-tained regardless of the input voltage.The LT1306 can therefore operate asa step-down converter.

During start-up, the inductor volt-age of a boost converter with a dioderectifier remains positive until theoutput voltage rises to one diode volt-age below the input voltage. A highinput-transient current spike invari-ably results. In the LT1306, theinductor voltage reverses polarityevery switching cycle. This, with cycle-by-cycle current limit, eliminates theinrush current spike.

The rectifier voltage drop dependson both the input and output voltages.Efficiency in step-down operation isapproximately that of a linear regu-lator. For sustained step-downoperation, the maximum output cur-rent will be limited by the packagethermal characteristics.

A hysteretic comparator insidedriver X5, which detects the cross-over between the input and the outputvoltages, signals the driver to provideappropriate base current to the recti-fier. DC transfer characteristics ofthis comparator are illustrated in Fig-ures 2 and 3.

When shutdown is activated(VS/S < 0.45V), all circuits except syn-chronous rectifier Q2 and its driverX5 are shut off. If VO is above VIN, Q2will be driven into saturation. Storedinductive energy flows to the outputthrough the saturated rectifier. As VOfalls below VIN, X5 reduces the basedrive to Q2, which increases therectifier voltage. The inductor voltageis now negative. The inductor currentcontinues to fall to zero. The driver X5then turns off and the rectifier Q2becomes an open circuit. The LT1306consumes 9µ A from the input inshutdown.

Single Li-ion Cellto 5V ConverterThe LT1306 is ideally suited for gen-erating 5V output from a single Li-ioncell. The circuit shown in Figure 4 iscapable of supplying 1A of DC outputcurrent. The value of resistor R3 ischosen so that the overall feedbackloop gain crosses 0dB before the right-half plane (RHP) zero. The capacitorCZ and the resistor R3 form a lowfrequency zero in the loop response.CP ensures adequate gain marginbeyond the RHP zero. The value of R3is inversely proportional to the erroramplifier gm. Low gm and high R3improve converter load-transientresponse.

ILOAD0.5A/DIV

IL1A/DIV

VOUT (AC)0.1V/DIV

VIN = 3.6V

1ms/DIV

VIN SW CAP

VC GND

FB

OUTS/S

LT1306

VIN =1.8V–3V

CIN10.1µF

CERAMIC

CIN222µF

2V/500kHz

CP39pF

CZ5.6nF

R391k

R1412k

R2249k

CO1220µF

CO2 1µFCERAMIC

VOUT3.3V/1A

L14.7µH

C11µF

D1

CIN1 =

CO1 =C1 =L1 =

D1 =

AVX TAJC226M010(207) 282-5111AVX TPSE227M010R0100AVX TAJA105K020MURATA LQN6C4R7(814) 237-1431CENTRAL CMDSH2-3(516) 435-1110

Figure 6. Start-up to shutdown transient response: note that the inputstart-up current is well controlled and that the output falls to zero inshutdown (IL is also the input current, as the inductor is at the input).

Figure 7. Transient response of the converter in Figure 4 with a 50mAto 800mA load step

Figure 8. 2-cell to 3.3V output converter

VS/S5V/DIV

VSW5V/DIV

IL(INDUCTOR CURRENT)

2A/DIV

VO5V/DIV

1ms/DIV

VIN = 2.5V


DESIGN FEATURES

In applications where high pulsecurrent (>1A) is drawn from the out-put, a large electrolytic capacitor(>1000µF) is typically used to hold upthe output voltage during the loadpulse. Higher output filter capaci-tance lowers the dominant polefrequency of the gain response so thathigher loop gain (that is, a highervalue of R3) is required in the com-pensation network to give the sameloop crossover frequency.

Efficiency curves of the converterare shown in Figure 5. Figure 6 showsa start-up-to-shutdown transient. Theconverter operates in step-down modeuntil the output voltage exceeds theinput voltage (2.5V). The mode switch-ing is evidenced by the suddendecrease in the SW node voltage. Theinput start-up current is well con-trolled at the switch current limit of2.2A. The converter then produces a

steady state output of 5V. Pulling theS/S pin low for at least 33µs discon-nects the load. Figure 7 shows theload transient response of theconverter.

2-Cell to 3.3V ConverterFigure 8 depicts an externally syn-chronized 2-cell to 3.3V converterrunning at 500kHz. A 4.7µ H inductoris used to take advantage of the higherswitching frequency. Driving the S/Spin with a clock generator, which hasa 2V amplitude and less than 20ns ofrise time, synchronizes the LT1306.Synchronization is positive-edge trig-gered. Diode D1 is a CMDSH2-3Schottky diode. Compared to a junc-

LOAD CURRENT (mA)

EFFI

CIEN

CY (%

)90

85

80

75

70

65

601 10 100 1000 10,000

VIN = 2.5V

VIN = 1.8V

VIN = 3V

VO = 3.3V

VIN SW CAP

VC GND

FB

OUTS/S

LT1306

CIN122µF

CIN20.1µFCERAMIC

CP22pF

CZ15nF

R375k

R1768k

R2249k

CO21µFCERAMIC

VOUT5V/1A

L110µH

C11µF

D1

CIN1 =

CO1 =C1 =L1 =

D1 =

AVX TAJC226M010(207) 282-5111AVX TPSE227M010R0100AVX TAJA105K020COILTRONICS CTX10-3(561) 241-7876MOTOROLA MMBD914LT1(800) 441-2447

CO1220µF

VIN3.6V–6.5V

tion diode, a Schottky diode increasesthe bootstrap voltage and affordshigher operating headroom for recti-fier Q2. In situations where reducedheadroom is acceptable (such as overthe commercial temperature range),a 1N4148 or 1N914 diode can also beused. The converter efficiency is plot-ted in Figure 9.

4-Cell to 5V ConverterDue to its ability to establish volt-second balance with VIN greater thanVO, the LT1306 is also suited forapplications where the battery volt-age straddles the desired outputvoltage. One such example is the 4-cellto 5V converter shown in Figure 10.

VSW5V/DIV

IL0.5A/DIV

VO0.1V/DIV

VIN = 4.8V

2µs/DIV

Figure 9. Efficiency of Figure 8’s circuit

Figure 10. 4-cell to 5V output converter

Figure 11. Continuous conduction mode switchingwaveforms in boost mode; VIN = 4.8V, VO = 5V


DESIGN FEATURES

VIN 6V–4V STEP5V/DIV

VSW5V/DIV

IL500mA/DIV

VO0.1V/DIV

0.5ms/DIV

LOAD CURRENT (mA)

EFFI

CIEN

CY (%

)

90

85

80

75

70

65

601 10 100 1000 10,000

VIN = 3.6V

VIN = 4.8V

VIN = 6V

VO = 5V

The continuous-conduction modeswitch-node voltage and the inductorcurrent for step-down operations (Fig-ure 12) are contrasted with those ofboost operation in Figure 11. Notethat in step-down mode, when therectifier is conducting, the switchvoltage exceeds VIN. Input step (from4V to 6V) transient response is illus-trated in Figure 13. The converterefficiency is plotted in Figure 14.

Figure 13. Transient response of the circuitin Figure 10 with step input (4V–6V)

Figure 14. Efficiency of Figure 10’s circuit

TESTING RTHERM = 420ΩWITH RWEAK = 475k

TESTING RTHERM = 420ΩWITH RNR = 10k

TESTING RTHERM = 420ΩWITH RUR = 1k

Figure 6. Testing an underrange thermistor

Smart Battery, continued from page 10

thermistor every 100µs. When AC isnot present, RNR and RUR thermistortesting occurs only when a battery isfirst inserted or removed or during atransmission requesting Safety Sig-nal status.

The underrange detection schemeis a very important feature of theLTC1759. As can be seen from Figure6, the RUR/RTHERM trip point of 0.333• VDD (1V) is well above the 0.047 •VDD (140mV) threshold of a systemusing a 10k pull-up for all ranges. Asystem using a 10k pull-up would notbe able to resolve the importantunderrange-to-hot transition pointwith a modest 100mV of ground offsetbetween the battery and thermistor-detection circuitry. Such offsets areanticipated when charging at normalcurrent levels.

ConclusionThe LTC1759 complies with the SmartBattery Charger standard publishedby the Smart Battery System organi-

zation, in which Linear Technology isa promoter and voting member. Thecharger controller also complies withIntel’s ACPI standard by being able torespond to system commands evenwhen there is not AC wall adapterpower. The charger offers the widestcurrent and voltage range of opera-

tion compared to competitive parts.Feature for feature, it also offers thehighest integration possible today witha Smart Battery Charger. TheLTC1759 achieves significant costsavings, performance and safetyadvantages over other Smart BatteryChargers currently available.

VSW5V/DIV

IL0.5A/DIV

VO50mV/DIV

2µs/DIV

VIN = 6V

Figure 12. Continuous conduction mode switchingwaveforms in step-down mode; VIN = 6V, VO= 5V

Authors can be contactedat (408) 432-1900

ConclusionThe LT1306 is a complete synchro-nous boost DC/DC converter offeringa set of features that few competingdevices are able to match. The uniquerectifier design results in a boost/step-down converter that disconnectsthe load in shutdown and controlsinput current during startup.


DESIGN FEATURES

Versatile Dual Hot Swap Controller/Power Sequencer AllowsLive Backplane Insertion by Bill Poucher

IntroductionWhen a circuit board is inserted intoa live backplane, the supply bypasscapacitors on the board can drawlarge transient currents from thebackplane power bus as they charge.These transient currents can destroycapacitors, connector pins and boardtraces and can disrupt the systemsupply, causing other boards in thesystem to reset. The new dual-chan-nel LTC1645 Hot Swap controller isdesigned to ramp a circuit board’ssupply voltages in a controlled man-ner, preventing glitches on the systemsupply and damage to the board.

The LTC1645’s two channels canbe set to ramp up and down sepa-rately, or they can be programmed torise and fall simultaneously, ensur-ing power supply tracking at the twooutputs. Using external N-channelpass transistors, the supply voltagescan be ramped at a programmable

rate. Two high-side switch driverscontrol the external N-channel FETgates for supply voltages ranging from1.2V to 12V. Programmable electroniccircuit breakers protect against shortsat either output. The LTC1645 is avail-able in the 14-pin and 8-pin SOpackages. The 14-pin version addi-tionally provides a system reset signaland a second “spare” comparator toindicate when board supply voltagesdrop below user-programmable lev-els. It also has a fault signal to indicatean overcurrent condition and a timerpin to create a delay before rampingup the supply voltages and deassertingthe system reset signal.

Typical Hot Swap ApplicationFigure 1 shows a typical Hot Swapapplication using the LTC1645. Q1and Q2 control the board’s powersupplies, RSENSE1 and RSENSE2 provide

current fault detection and R1 andR2 prevent high frequency oscilla-tion. By ramping the gates of the passtransistors up and down at a con-trolled rate, the transient surgecurrent (I = C • dv/dt) drawn from themain backplane supply is limited to asafe value when the board makesconnection.

The timing for the board is shownin Figure 2. When power is first appliedto the chip, the gates of the FETs(GATE1 and GATE2 pins) are pulledlow. Once the ON pin rises at timepoint 1, the LTC1645 must completea timing cycle before the GATE pinvoltages are allowed to rise. This allowsthe connector pins to finish bouncingand make a solid connection. CTIMERcharges to 1.23V with a 2µ A currentsource, setting the delay timing cycleequal to t = (1.23V • CTIMER)/2µ A. Inthis example, the undervoltage lock-

RSENSE20.01Ω

Q1

Q2

R210Ω C2

0.01µF50V

CTIMER0.33µF

CLOAD1

CLOAD2

R110Ω C1

0.01µF50V

12 1 2 3

8

9

6

5

11 7

1314

10

4

GATE2VCC2

VCC25V

VCC112V

VOUT25V/2.5A

VOUT112V/1A

LTC1645(14-LEAD)

GND

COMP+

COMPOUT

FB

SENSE2GATE1

RESET

+

+

RSENSE10.025Ω

RESET

ON/OFF

FAULT

GND

BACK

PLAN

E

PC B

OARD

10k1%

1.3k1%

4.99k1%

1.82k1%

VCC1

ON

FAULT

SENSE1

TIMER

Figure 1. LTC1645 typical application


DESIGN FEATURES

out circuit discharges the TIMER pinand prevents both channels fromturning on when VCC1 < 2.23V or VCC2< 1.12V (time point 2). At time point 4,the timing cycle is completed and theGATE pins are pulled up by an inter-nal 10µ A current source; the voltageat GATE1 begins to rise with a slopeof 10µ A/C1 and the voltage at GATE2begins to rise with a slope of 10µA/C2. The supply voltages follow theirrespective gate voltages minus the

external FET threshold voltage; theramp time for each supply is (VCCn •Cn)/10µA.

Voltage Monitorand Spare ComparatorThe 14-pin version of the LTC1645provides two precision comparatorsfor monitoring input or output volt-age levels. Both comparators have a1.238V reference as the negative inputand have open-drain outputs that

require an external pull-upto generate a logic high. Thespare comparator monitorsCOMP+ and releases COMP-OUT immediately wheneverCOMP+ is above 1.238V. TheFB comparator releasesRESET one timing cycle afterthe FB pin rises above1.238V (Figure 2, time points5 and 6) and includes a glitchfilter to prevent system re-sets during short negativetransients on the FB pin.The filter time is 20µs forlarge transients (greaterthan 150mV) and up to100µ s for smaller 10µ Atransients.

In Figure 1, the COMPOUT pin hasbeen tied to the FB pin so that RESETwill not release until both outputsupplies remain above their program-mable voltages for one timing cycle.

Electronic Circuit BreakerThe LTC1645 features an electroniccircuit breaker function that protectsagainst short circuits or excessiveoutput current. Load current for eachsupply is monitored by a sense resis-tor between the supply input and sensepin of the chip. The circuit breakertrips whenever the voltage across thesense resistor exceeds 50mV for morethan 1.5µ s. When the circuit breakerof either channel trips, both GATEpins are immediately pulled to groundand the external FETs are quicklyturned off (Figure 2, time point 7).When the ON pin is cycled off and on(time point 8), the circuit breaker resetsand another timing cycle starts. If thecircuit breaker feature is not required,short the SENSE pins to theirrespective VCC pins.

ON

VCCn

TIMER

1.23V 1.23V

GATEn

RESET

VOUTn

1 2 3 4 5 6

1.23V 1.23V

7

1.5µs

~20µs ~20µs

8 9

VCCn – VSENSEn

UNDERVOLTAGELOCKOUT

FB TRIPPOINT

–

+

–

+

–

+

GATE2 ON/OFF

GATE1 ON/OFF

BOTH GATESFAST PULL-DOWN

2.0V

0.8V

0.4V

ON

LTC1645

Figure 2. Typical insertion and electronic-circuit-breaker timing

Figure 3. On-pin operation



DESIGN FEATURES

The ON PinThe ON pin has multiple thresholdsto control the ramping up and downof the GATEn pins. Figure 3 is a blockdiagram showing operation of the ONpin. If the ON pin voltage is below0.4V, GATE1 and GATE2 are immedi-ately pulled to ground. While thevoltage is between 0.4V and 0.8V,GATE1 and GATE2 are each pulled toground with a 40µA current. Between0.8V and 2V, the GATE1 10µA pull-up is turned on after one timing cycle,but GATE2 continues to be pulled toground with a 40µA current. Whenthe voltage exceeds 2V, both theGATE1 and GATE2 10µ A pull-upsare turned on one timing cycle afterthe voltage exceeds 0.8V.

Power Supply Trackingand SequencingSome applications require that thedifference between two power supplyvoltages not exceed a certain value.This requirement applies duringpower-up and power-down, as wellas during steady state operation; oftenthis is done to prevent latch-up in adual-supply ASIC. Other systemsrequire one supply to come up afteranother, for example, when a systemclock needs to start before a block of

logic. Typical dual supplies or back-plane connections may come up atarbitrary rates depending on loadcurrent, capacitor size, soft-start ratesand so on. Traditional solutions canbe cumbersome or require complexcircuitry to meet the necessaryrequirements.

The LTC1645 provides simplesolutions to power supply trackingand sequencing needs. The LTC1645can guarantee supply tracking by

ramping the supplies up and downtogether and allows nearly any com-bination of supply ramping to satisfyvarious sequencing specifications.Figure 4 shows an application ramp-ing VOUT1 and VOUT2 up and downtogether. The ON pin must reach 0.8Vto turn on GATE1, which ramps upVOUT1 and VOUT2. The spare compara-tor pulls the ON pin low until VCC2 isabove 2.3V, and the ON pin cannotreach 0.8V before VCC1 is above 3V.

Q11/2 Si4920DY

Q21/2 Si4920DY

0.01Ω*

0.01Ω*

10Ω

10Ω

1.18k1%

10k

1.37k1%

0.1µF25V

0.33µF

*WSL1206-01-1% VISHAY DALE (408) 241-4588

CLOAD1

CLOAD2

D11N4002

D3MBR0530T1D2

1N4002

1 2 3

8

9

6

5

11 7

13 1214

BOTH CURRENT LIMITS: 5A

10

4

VCC1

ON

FAULT

TIMER GND

SENSE1 GATE2GATE1 VCC2

TRIPPOINT:

3V

VIN13.3V

VIN22.5V

VOUT13.3V/2.5A

VOUT22.5V/2.5A

RESET

LTC1645(14-LEAD)

COMP+

COMPOUT

FB

SENSE2

RESET

+

+

1.18k1%

4.99k1%

1.37k1%

1.82k1%

VIN15V/DIV

VIN25V/DIV

VOUT25V/DIV

VOUT15V/DIV

TIMER2V/DIV

RESET5V/DIV

Figure 4. Ramping 3.3V and 2.5V up and down together

Figure 5. Input, output and control signals of Figure 4’s circuit


DESIGN FEATURES

Thus, both input supplies must bewithin regulation before a timing cyclecan start. At the end of the timingcycle, the output voltages ramp uptogether. If either input supply fallsout of regulation or if an overcurrentcondition is detected, the gates of Q1and Q2 are pulled low together.

Figure 5 shows an oscilloscopephoto of of Figure 4’s circuit in action.On power-up, VOUT1 and VOUT2 rampup together. On power-down, theLTC1645 turns off Q1 and Q2 simul-taneously. Charge remains stored onCLOAD1 and CLOAD2 and the outputvoltages will vary depending on theloads. D1 and D2 turn on at ≈1V(≈0.5V each), ensuring that VOUT1never exceeds VOUT2 by more than1.2V, while D3 guarantees that VOUT2is never greater than VOUT1 by morethan 0.4V. Barring an overvoltage

IRF7413

IRF7413

10Ω10Ω

28k1%

RHYST681k

14.7k1%

10k1%

0.01µF25V

0.33µF

112 2 3

8

9

6

5

11 7

10

4

ON

FAULTTIMER GND

1314VCC1 SENSE1 GATE2GATE1 VCC2

VIN23.3V

VIN15V

VOUT15V5A

D11N4148

VOUT23.3V5A

LTC1645(14-LEAD)

COMP+

COMPOUT

FB

SENSE2

FAULT

0.01µF25V

RESET

+

CLOAD1

CLOAD2

+

10k

R147.5k1%

R210k1%

10k 10k

10k1%

RESET2

RESET

0.005Ω*

0.005Ω*

13k1%

LRF1206-01-R005-JIRC (361) 992-7900

BOTH CURRENT LIMITS: 10A

*

condition at the input(s), the onlytime these diodes can conduct cur-rent is during a power-down event,and then only to discharge CLOAD1 orCLOAD2. In the case of an input over-voltage condition that causes excesscurrent to flow, the circuit breakerwill trip if the current limit level is setappropriately.

Figure 6 shows the LTC1645 con-figured to ramp up VOUT1 before VOUT2.CLOAD1 is initially discharged and D1is reverse-biased, thus the voltage atthe ON pin is determined only by VCC1through the resistor divider R1 andR2. If VCC1 is above 4.6V, the voltageat the ON pin exceeds 0.8V and VOUT1ramps up one timing cycle later. AsVOUT1 ramps up, D1 forward-biasesand pulls the ON pin above 2V whenVOUT1 ≈ 4.5V. This turns on GATE2and VOUT2 ramps up. The FB com-

parator monitors VOUT2, and the sparecomparator monitors VOUT1 with RHYSTcreating ~50mV of hysteresis. Toensure that VOUT1 does not fall muchbelow VOUT2 as the load capacitorsdischarge during power down, aSchottky diode can be connected fromVOUT2 to VOUT1.

ConclusionDesigning a traditional hot-insertionsystem requires a significant effort byan experienced analog designer. Aneasy way to reduce the design effort isto use the LTC1645, which offerscharge-pump gate drivers, a userprogrammable delay, voltage levelmonitors and other specializedfeatures. With the LTC1645, it iseasy to create reliable Hot Swapsystems.

Figure 6. Ramping up 5V followed by 3.3V

For more information on parts featured in this issue, seehttp://www.linear-tech.com/go/ltmag



DESIGN FEATURES

LTC1642: a Hot Swap Controllerwith Foldback Current Limitingand Overvoltage ProtectionHot Circuit InsertionWhen a circuit board is inserted intoa “hot” (powered) backplane, its sup-ply bypass capacitors can draw largecurrents from the backplane powerbus as they charge. These currentscan cause glitches on the backplanesupply voltage, resetting other boardsin the system, and can even destroyedge connectors. Like other membersof Linear Technology’s Hot Swap fam-ily, the LTC1642 limits the chargingcurrent drawn by a board’s capaci-tors, allowing safe circuit boardinsertion into a hot backplane. It alsooffers additional capabilities, somenew to the Hot Swap family: a maxi-mum recommended operating voltageof 16.5V, a programmable electroniccircuit breaker with foldback currentlimiting, overvoltage protection to 33V,and a voltage reference and uncom-mitted comparator.

In the circuit shown in Figure 1,the LTC1642 and the external NMOSpass transistor Q1 work together to

limit the charging current when aboard is plugged into a hot back-plane. In this application, thebackplane voltage is 12V, but thechip will operate with any supplyvoltage between 3.0V and 16.5V. Whenpower is first applied to VCC, the chipholds Q1’s gate at ground. After aprogrammable debounce delay, aninternal 25µA current source beginsto charge the external capacitor C2,generating a voltage ramp of 25µ A/C2 V/s at the GATE pin. Because Q1acts as a source follower while its gateramps, the current charging theboard’s bypass capacitance, CLOAD, islimited to 25µA • CLOAD/C2. An inter-nal charge pump supplies the 25µAgate current, ensuring sufficient gatedrive to Q1. Resistor R3 protectsagainst high frequency FET oscilla-tions; capacitor C1 sets the debouncedelay, ∆TD, before the GATE pin volt-age begins ramping: ∆TD(ms) = 615 •C1(µF). The ON pin is the chip’s con-trol input; when it is below 1.22V, the

GATE pin is held at ground. If ON/OFF control of the LTC1642 is notrequired, ON should be tied to VCCthrough a 50k current limiting resis-tor. Typical waveforms at cardinsertion are shown in Figure 2.

Short-Circuit ProtectionA short circuit from Q1’s source toground can destroy the FET; it canalso reset every other card in thesystem if the backplane supply volt-age droops due to the excessivecurrent. The LTC1642 can protectagainst both threats by limiting thecurrent drawn from the backplanesupply during a short circuit and byopening an electronic circuit breakerbefore Q1 overheats. The addition ofanalog current limiting to the stan-dard electronic circuit breakerfunction can improve system perfor-mance. For example, consider asystem of plug-in cards powered by abackplane supply. The suddenremoval of one card causes the back-plane voltage to ring at a fairly highfrequency, due to the step change insupply current. This ringing signalappears differentially across the sense

ON

OV

FAULT

FB

RESET

CRWBR

4

9

6

7

5

1

VCC SENSE GATE

GND BRK TMR RST TMR8 2 3

16 15 14

C40.01µF

C10.33µF

R530k

C3

0.068µF

Q1FDS6630A

R3100Ω

R4

330Ω

C20.047µF

R895.3k1%

R912.4k1%

CLOAD

Q3MCR12DC

Q22N2222

R10*220Ω

F1R2

0.01Ω

R6127k

1%

R712.41%

OVERVOLTAGE = 13.7V

12V

GND

PLUG-IN CARDBACKPLANE

OPTIONAL

C50.1µF

VOUT12.5V/2A

ONLY REQUIRED WITH SENSITIVE GATE SCRsNOT NEEDED WITH MCR12

*

UNDER-VOLTAGE= 10.6V

LTC1642

R151k

VOUT

GATE

RST_TMR

ON

VOLT

AGE

TIME

∆TD

dvdt

25µAC2

=

Figure 1. Typical LTC1624 Hot Swap application Figure 2. Typical waveforms at card insertion

by Pat Madden


DESIGN FEATURES

resistor on each remaining card. Itcan trip the circuit breaker, eventhough there is no fault on the card.To prevent this, the designer mayattempt to slow the circuit breaker byconnecting a lowpass RC networkacross the sense resistor, only to findthat one problem has been exchangedfor another: if there is a short circuiton the card, the backplane voltagedroops too much before the circuitbreaker opens. The LTC1642 shinesin this application. It regulates theload current within a few microsec-onds after a short circuit, before thebackplane can droop, but can delayopening the circuit breaker for milli-seconds or more, which allows theringing to decay, resulting in almostcomplete immunity from backplanenoise.

The external components that pro-vide short-circuit protection areincluded in Figure 1. R2 senses theload current, and, if its voltage dropreaches the internal threshold, thecurrent-limit servo loop adjusts theGATE pin voltage such that Q1 actsas a constant current source. R2’svoltage limit decreases as the outputvoltage decreases; this “foldback”tends to keep Q1’s power dissipationconstant in current limit. The outputvoltage is sensed at the FB pin. WhenFB is grounded, the internal thresh-old voltage is 20mV, but this increasesgradually to 50mV with increasingvoltage at FB. To compensate thisservo loop R4 is added in series withC2; to ensure stability, the product

1/(2 • π • R4 • C2) should be keptbelow the loop’s unity-gain frequencyof 125kHz and C2 should be largerthan Q1’s input capacitance, CISS.The values shown in Figure 1, C2 =0.047µ F and R4 = 330Ω, work wellwith the Fairchild FDS6630A andsimilar MOSFETs. The FAULT out-put, when asserted, signals that thecircuit breaker has opened. Capaci-tor C3 and resistor R5 set the delay,∆TBRK, between the onset of currentlimiting and the circuit breaker open-ing: ∆TBRK(ms) = [62 – R5(kΩ)] • C3(µF).R5 slows C3’s discharge, ensuringthat the circuit breaker eventuallyopens in the event of repetitive, butshort, current faults. These are dan-gerous because the slow voltage rampat Q1’s gate means that it continuesto dissipate substantial power forsome time after the current limitclears. Larger values of R5 protectagainst lower duty cycle shorts, at thecost of greater uncertainty in the cir-cuit breaker delay time. A prudentupper limit on R5 is 30k, which willopen the circuit breaker if the dutycycle of a repetitive short exceeds50%.

Typical waveforms during a shortcircuit are shown in Figure 3. Theload is shorted to ground at time 1.The GATE voltage drops until Q1comes into regulation and the circuitbreaker timer (BRK TMR) starts. Theshort is cleared at time 2, before thebreaker opens, and the GATE voltageramps back up. At time 3, the load isshorted again and at time 4 thebreaker opens, pulling the GATE toground and asserting FAULT.Although the short is cleared at time5, FAULT doesn’t go high until time 6(it has an internal 10µA pull-up),after the ON pin has been low for twomicroseconds. At time 7, ON goeshigh and the debounce timer(RST TMR) starts; at time 8 the GATEvoltage begins ramping.

Powering Up in Current LimitRamping the GATE pin voltage indi-rectly limits the charging current toI = 25µ A • CLOAD/C2, where C2 is theexternal capacitor connected to theGATE and CLOAD is the load capaci-

tance. If the value of CLOAD is uncer-tain, a worst-case design can resultin needlessly long ramp times and itmay be better to limit the chargingcurrent directly by allowing theLTC1642 to power up in current limit.This is perfectly acceptable as long asthe circuit breaker delay is longenough to power up under worst-caseconditions.

AutomaticallyRestarting afterthe Circuit Breaker OpensThe LTC1642 will automaticallyattempt to restart itself after the cir-cuit breaker opens if the FAULT outputis tied to the ON pin input. The result-ing waveforms during a short circuitare shown in Figure 4. As the figureshows, pass transistor Q1’s duty cycleis equal to the circuit breaker delay,∆TBRK, divided by the sum of the cir-cuit breaker and debounce delays,∆TBRK + ∆TD. Q1 dissipates substan-tial power while acting as a constantcurrent source, so be sure itsmaximum junction temperature isnot exceeded in worst-case condi-tions. For example, the FDS6630Ain Figure 1 dissipates 24W(= 2A •12V) DC when the load is shorted toground. Its absolute maximum junc-tion temperature, TJ, is 150°C, so anambient temperature, TA, of 85°Crequires an effective junction-to-am-bient thermal resistance of 2.7°C/W(= (TJ – TA)/(I • V)) or less. The effectivejunction-to-ambient thermal resis-tance is the product of two factors:θJA, the DC junction-to-ambient ther-mal resistance, which depends on thepackage and board layout; and r(t), a

ILOAD

GATE

ILIMIT

1.23V

VOUT

6

754321 8

GATE

BRK TMR

RST TMR

ON

0A

1.23V

FAULT

654321

BRK TMR 1.23V

1.23V

GATE

VOUT

RST TMR

ON/FAULT

Figure 3. Current-limit and circuit-breakertiming

Figure 4. Automatic restart following a shortcircuit


DESIGN FEATURES

derating factor that depends on thetransistor’s duty cycle and “on” time.Referring to the FDS6630A’s datasheet, a 0.2in2 mounting pad of 2oz.copper on an FR-4 board produces aDC thermal resistance, θJA, of105°C/W; referring to Figure A(Transient Thermal Response Curve—reproduced from the FDS6630A datasheet), a 2ms circuit breaker delayand a 200ms debounce delay pro-duce an r(t) derating of 0.02; the overalleffective thermal resistance is 2.1°C/W (= r(t) • θJA).

If FAULT is tied to ON, open-drainlogic should be used to drive thenode, and the external pull up resis-

tor at the ON pin may be omitted,because FAULT provides a weakinternal pull-up.

Overvoltage ProtectionThe LTC1642 can protect a card fromexcessive voltage by quickly turningoff the pass transistor if the supplyvoltage exceeds a programmable limitand by triggering a crowbar SCR aftera programmable delay. The LTC1642includes an internal regulator thatprotects against supply voltages upto 33V. It can also be configured toautomatically restart when an over-voltage condition clears.

The external components that pro-vide overvoltage protection areincluded in Figure 1. Resistors R6and R7 set the overvoltage limit, tim-ing capacitor C4 sets the delay beforethe crowbar SCR Q3 fires and NPNfollower Q2 boosts the trigger currentinto Q3. When VCC exceeds (1 + R6/R7) • 1.22V, an internal comparatortrips and the chip cuts off Q1 bypulling its gate to ground. For betternoise rejection, the propagation delaythrough the comparator (on a low-to-high transition at OV) increases from20µs to 80µ s as the differential inputvoltage decreases from 175mV to 3mV.Once the comparator trips, an inter-nal 45µ A current starts charging C4;when it reaches 0.41V the currentincreases to 1.5mA and Q2 quicklytriggers the SCR. The delay, ∆TSCR,before the SCR triggers is ∆TSCR(ms) =

1.22V

0.41V

VCC

0V

0V

1.22V

GATE 0V

VCC

VOUT

OV

6 7 854321

CRWBR

RST TMR

ON

FAULT

ON

OV

FAULT

FB

RESET

CRWBR

4

9

6

7

5

1

VCC SENSE GATE

GND BRK TMR RST TMR8 2 3

16 15 14

C10.33µF

R530k

C3

0.068µF

Q1FDS6630A

R3100Ω

R4

330Ω

C20.047µF

R895.3k1%

R912.4k1%

R20.01Ω

R1082.5k

1%

R1111.3k

1%

LOCKOUT= 10.1V

(FALLING)

12V

GND

PLUG-IN CARDBACKPLANE

C50.1µF

D11N4148

LTC1642

Figure 5. Overvoltage timing

Figure A. Fairchild FDS6630A transient thermal response curve (reproduced by permission, from the FDS6630A data sheet)

Figure 6. Increasing the undervoltage lockout threshold

r(t),

NOR

MAL

IZED

EFF

ECTI

VETR

ANSI

ENT

THER

MAL

RES

ISTA

NCE

1

0.5

0.2

0.1

0.05

0.02

0.01

0.005

0.002

0.0010.0001 0.001 0.01 0.1 1 10 100 300

D = 0.5

SINGLE PULSE

0.010.02

0.05

0.1

0.2 RθJA(t) = r(t) • RθJARθJA = 125°C/W

TJ – TA = P • RθJA(t)DUTY CYCLE, D = t1/t2

t1t2

P(pk)

t1, TIME (s)


DESIGN FEATURES

9 • C4(µF). Once C4 reaches 0.41V,the LTC1642 latches off. After theovervoltage clears, GATE and FAULTremain at ground and the 1.5mAcharging current persists. To restartafter the overvoltage clears, hold theON pin low for at least 2µs and thenbring it high. The GATE voltage willbegin ramping up after a debouncedelay. The chip will restart if FAULTand ON are connected together: theGATE voltage begins ramping up onedebounce delay after the overvoltageclears.

Figure 5 shows typical waveforms.The OV comparator goes high at time1, causing the chip to pull the GATEpin to ground and start charging C4.At time 2, before the capacitor reaches0.41V, OV falls below 1.22V; C4 dis-charges and the GATE voltage beginsramping after the debounce delay endsat time 3. Another overvoltage beginsat time 4, and at time 5 C4 reaches0.41V; FAULT goes low and the charg-ing current increases to 1.5mA. Evenafter OV falls below 1.22V at time 6,GATE and FAULT stay low andCRWBR continues to source 1.5mA.FAULT goes high when ON goes lowmomentarily at time 7; after adebounce delay ending at time 8, theGATE voltage begins ramping.

The LTC1642’s internal regulatorturns on when VCC exceeds 17.5Vand turns off when it drops below17.0V. While on, it limits the internalsupply voltage to most of the chip’scircuits to 15V. They will functionnormally except that the GATE pincharge pump is disabled. Set theresistor divider at the OV pin to ensurethat GATE is grounded with VCC lev-els above 16.5V.

Undervoltage LockoutAn internal undervoltage lockout cir-cuit keeps the GATE pin at grounduntil VCC exceeds 2.73V. If it fallsbelow 2.5V, the lockout circuit pullsGATE to ground and resets the circuitbreaker and SCR trigger. To set ahigher lockout voltage, tie the ON pinto a resistor divider driven from VCC,as shown in Figure 6. The chip remainslocked out until VCC exceeds (1 +R10/R11) • 1.33V and will also lockout if VCC falls below (1 + R10/R11) •1.22V. If the resistive divider is usedin conjunction with automatic restart,connect FAULT to ON through a di-ode, as shown. Otherwise FAULT’sinternal pull-up current, which var-ies with operating voltage andtemperature, will skew the lockoutthreshold.

Undervoltage MonitorIn Figure 1, the LTC1642’s FB pinmonitors the output voltage; the chipasserts RESET if the output falls be-low 1.22V • (1 + R8/R9) (10.6V for theR8 and R9 values in the figure). RESETgoes high (it has a 10µA internal pull-up) when the output has continuouslyexceeded this voltage for one debouncedelay. Typical waveforms are shownin Figure 7. On power-up, RESET is

VOUT

RST TMR

V1 V2 V2V1

54321

RESET

V1

asserted; it remains low until onedebounce delay (∆TD(ms) = 615 •C1(µF)) after FB crosses 1.22V attime 1. At time 2, FB falls below 1.22Vand RESET is asserted immediately.When FB exceeds its threshold attime 3, the debounce timer starts, butFB falls below 1.22V (time 4) beforethe debounce delay ends and RESETremains low. FB crosses 1.22V oncemore at time 5 and RESET goes highone debounce delay later. To improvenoise rejection, the FB comparator’spropagation delay (on a falling edge atFB) increases from 20µ s to 80µ s asthe differential input voltage decreasesfrom 175mV to 3mV.

Reference andUncommitted ComparatorThe LTC1642’s internal voltage refer-ence is buffered and brought out tothe REF pin. The buffer amplifiershould be compensated with acapacitor connected between REF andground. If no DC current is drawnfrom REF, 0.1µF ensures an adequatephase margin, but larger capacitorscan be used for better suppression ofhigh frequency noise on REF.

The LTC1642 also includes anuncommitted comparator with anopen drain output and a commonmode input range includes ground.

ConclusionThe LTC1642 is a rugged Hot Swapcontroller that can handle positivesupplies up to 15V. It also providesfast, effective current limiting even inthe presence of a noisy backplanesupply and can protect plug-in cardsagainst overvoltages up to 33V.

Figure 7. Undervoltage monitor waveforms


forthe latest information

on LTC products, visit

www.linear-tech.com


DESIGN IDEAS

Cost and Space Efficient Backlightingfor Small LCD Panels by Jim Williams

A generation of small, portable,“palmtop” computing devices hasrecently appeared. These productshave small LCD displays that usecold cathode fluorescent lamps(CCFLs) for backlighting. These lampsrequire high voltage AC current drive.Circuitry for this purpose should bephysically small, cost effective andelectrically efficient.

Figure 1 shows a design that meetsthe above criteria. The configurationis a current-fed resonant Royerconverter driven by an LT1317Bmicropower switching regulator. TheLT1317B effects a switch-mode cur-

rent sink, supplying the requiredRoyer drive to close a loop at the FBpin. This path includes the lamp anda filter network that rectifies T1’shigh voltage AC output into DC. Inthis case, the circuit’s operating point,and hence, the lamp current, is set bya potentiometer. Operating-pointvariation can also be achieved byvoltage controlling the optional in-put, indicated on the schematic.1 Withthe components shown, size is about10mm (W) by 5mm (H) by 40mm (L).The Shutdown pin facilitates circuitturnoff, although removing powerfrom the VIN pin has similar results.

The closed loop operation yieldsexcellent line regulation while ensur-ing that lamp currents never violateminimum or maximum values. Thesecharacteristics allow operationdirectly from the battery withoutintensity variation, flicker or shorten-ing of lamp life. Simplicity, lowcomponent count, small size and costeffectiveness make this circuit anexcellent choice for “palmtop” LCDillumination.

1 Those finding this description intolerably briefare directed to LTC Application Note 65, wherethis circuit receives more scholarly attention.

VIN

SHDN

VSW

FB

VC GND

LT1317B

+

+

Q1 Q20.15µF*750Ω

1 5 4 3 2

6 10LAMP

T1

L1100µH

22k

MMB-0914

DIMMING0V–3V

(OPTIONAL)

10k

0.1µF 820Ω**

2k1µF

10µF

V+(3V–9V TYP)

MBR0520

T1: TOKO BLC210(408) 432-8281

L1: SUMIDA CD43-100(847) 956-0666

Q1, Q2: ZETEX ZDT-1048 (DUAL)(516) 543-7100

* WIMA MKI(914) 347-2474

** 1% FILM RESISTOR† MOTOROLA

(800) 441-2447DO NOT SUBSTITUTECOMPONENTS

BAV-99†

SHUTDOWN

3

2 1

Figure 1. Palmtop computer LCD backlight supply



DESIGN IDEASCost and Space EfficientBacklighting for Small LCD Panels................................................... 27

Jim Williams

High Efficiency PolyPhase ConverterCombines Power from Multiple Inputs................................................... 28

Wei Chen and Craig Varga

Isolated RS485 TransceiverBreaks Ground Loops .................. 29Mitchell Lee

Sharp Gain Roll-Offs Using theLTC1562 Quad Operational Filter IC(Part 3) ........................................ 31Nello Sevastopoulos

Using the LT1719 Comparator forLow Dispersion Sine Wave toSquare Wave Conversion ............. 34Joseph G. Petrofsky


DESIGN IDEAS

High Efficiency PolyPhase ConverterCombines Power from Multiple Inputs

by Wei Chen and Craig Varga

IntroductionAs more functions are integrated intoone IC, the power drawn by a single ICcan easily exceed the capability of asingle input power source. One solu-tion is to use several available powersources to obtain the required outputpower, drawing some percentage ofthe total power from each source. TheLTC1929 PolyPhase™ controller pro-vides a simple solution to this problem.

Design DetailsThe LTC1929 is a PolyPhase dual,current mode controller. It is capableof driving two synchronous buckchannels 180 degrees out of phase toreduce output switching ripple cur-

rent and voltage. One buck stagereceives its input power from the 12Vinput and the other receives its powerfrom the 5V input. In a 2-phase design,as the inductor current in the 5Vcircuit increases, the inductor cur-rent in the 12V circuit decreases.This results in a smaller net ripplecurrent flowing into the outputcapacitor. Since there are two inter-vals in one switching period whereripple cancellation takes place, theoutput ripple voltage of the 2-phasedesign is much smaller than that of asingle-phase design and fewer outputcapacitors can be used.

A Typical ApplicationThe currents available from a PCIconnector are limited to 2A for the 5Vsupply and 1A for the 12V supply. Inthe example shown here, the load canbe as high as 6A or 16.8W at 2.8V.Neither the 5V nor the 12V source iscapable of providing this power.Hence, it is desirable to design apower supply that can draw currentsfrom two power sources and whosemaximum input currents from eachsource will not exceed the correspond-ing limit. With only one IC, two SO-8MOSFETs and two small inductors, ahigh efficiency, low noise power sup-ply can be built.

Figure 1. LTC1929 PCI-bus powered, dual-input PolyPhase power supply

+

24

27

25

28

26

23

22

21

20

16

18

17

19

15

+

+

+2

3

5

6

7

1

8

4

10

9

11

12

13

14

SENSE1+

SENSE1–

PLLFLTR

PLLIN

NC

RUN/SS

ITH

EAIN

VDIFFOUT

SGND

VOS–

VOS+

SENSE2–

SENSE2+

VIN

TG1

BOOST1

NC

SW1

BG1

EXTVCC

INTVCC

PGND

TG2

BOOST2

SW2

BG2

AMPMD

LTC1929

VOUT+

2.8V/6A

VOUT–

RTN

5VIN+

RTN

12VIN+

RTN

C4470µF16V

C91500µF6.3V

C141500µF6.3V

C151µF

C31µF

C81µF

L1 7µH/4A

L2 7µH/4A

R20.007Ω

R40.007Ω

Q1A

Q1B

Q2A

Q2B

C6

1µF

C710µF10VTa

C10 0.22µF

C5

0.22µF

C161000pFR6

20k1%

R549.9k1%

C121200pF

C13(OPT)

C110.1µF

R3(OPT)

R1 10ΩC2 1µF

C11000pF

D1BAT54A

L1, L2:

Q1, Q2:

C4:

C9, C14:

SUMIDA CEE125-7R0(847) 956-0666FAIRCHILD FDS6690A(207) 775-4502SANYO 16MV470AX(619) 661-6835SANYO 6MV1500AX



DESIGN IDEAS

Isolated RS485 TransceiverBreaks Ground Loops by Mitchell Lee

The RS485 interface is designed tohandle a –7V to 12V input signalrange; however, in practical systems,ground potentials vary widely fromnode to node, often exceeding thespecified range. This can result in aninterruption of communications, orworse, destruction of a transceiver.Guarding against large ground-to-ground differentials calls for anisolated interface. A new surfacemount device, the LTC1535 isolatedRS485 transceivers, provides a one-chip solution for breaking groundloops.

Previously, isolation was achievedusing at least three optoisolators anda separate isolated power supply. TheLTC1535 replaces not only the opto-isolators, but also the power supply,as it includes an on-chip DC/DCconverter. Other features includeselectable driver slew rate to reduceEMI and susceptibility to reflections,full-duplex pinout and fail-safedetection of open and shorted lines.

The LTC1535 consists of two sepa-rate dice assembled on a proprietary,isolated lead frame. The lead frameincludes integral coupling capacitorsthat bridge the isolation barrier andexhibit 2,500VRMS guaranteed stand-off. Data communication takes placevia the coupling capacitors, while anon-chip, 400kHz push-pull switchingregulator sends power to the isolatedside through a small transformer.Total common-mode capacitanceacross the barrier amounts to lessthan 20pF, with the transformeraccounting for about 16pF of the total.Figure 1 shows the complete circuitfor a fully isolated RS485 port.

The two halves of the LTC1535communicate in a ping-pong fashion,first sending transmit data to theisolated side and then sending re-ceive data back to the nonisolatedside. The sampling nature of theinternal communications link meansthat some jitter is introduced into the

data; this limits the useful baud rateto approximately 500kBd. At 350kBd,the jitter is guaranteed to be less than10%. Figure 2 shows a double pulsepropagating through the LTC1535.Waveform (A) is the transmitter datainput and waveform (B) is the outputof the receiver. The transmitter andreceiver are looped back on the iso-lated side of the chip. The typicaljitter is hardly visible. A negative-going double pulse is shown in Figure3. The LTC1535 transceiver is unaf-fected by the DC average of the datawaveform. Total round-trip propaga-tion delay through the LTC1535 isapproximately 1µ s or roughly equiva-lent to 328 feet of cable.

Figure 4 shows the driver outputwaveform when loaded by 5000' ofterminated cable, operating in thefast slew mode (SLEW pin pulled high).The effect of the SLEW pin on thedriver output waveform is noticeablein Figure 5, where rise and fall timesof approximately 1µ s result.

Isolation can bring potentially dan-gerous voltages onto a circuit boardand within easy reach of the end user.

For example, if the twisted pair isaccidentally miswired or faults to 117Vat some remote location, the floatingsection of each LTC1535 and its asso-ciated circuitry will also carry 117V.An unwary user or installer couldthen come in contact with what isassumed to be a safe, low voltagecircuit. Figure 6 shows how to detectand warn the user that a fault condi-tion exists on the twisted pair or itsshield. A small (3.2mm) glow lamp isconnected between GND2 (theLTC1535’s floating ground) and theequipment’s safety “earth” ground. Ifa potential of more than 75VAC ispresent on the twisted pair or shield,B1 will light, indicating a wiring fault.Resistors R3 and R4 are used to bal-last the current in B1. Two resistorsare necessary because each resistorcan only stand off 200V, as well as forreasons of power dissipation. Asshown, the circuit can withstand adirect fault to a 440V, 3-phase system.

Other problems introduced by float-ing the twisted pair include thecollection of static charge on thetwisted pair, its shield and the

Figure 1. Fully isolated RS485 port

RO RE DE DI SLO RO2 A B

VCC1 ST1 ST2 GND1 GND2 Z Y VCC2

28 27 26 25 18 17 16 15

1 2 3 4 11 12 13 14

LTC1535

DI

DE

RE

RO

5V INPUT

ISOL

ATIO

NBA

RRIE

R

TWISTEDPAIRNETWORK

1/2 BAT54C

1/2 BAT54C

CTX02-14659

10µF

10µF

1

1

1

2

2

2

2

LOGIC COMMON

FLOATING RS485COMMON

+

+*

*COILTRONICS (561) 241-7876


DESIGN IDEAS

2V/DIV

2µs/DIV

A

B

5V/DIV

2µs/DIV

A

B

5V/DIV

2µs/DIV

2V/DIV

2µs/DIV

attached circuitry. R1 and R2 providea path to shunt static charge safely toground. Again, two resistors are nec-essary to withstand high voltagefaults. Electrostatic spikes and tran-sients can temporarily elevate thetwisted pair to 10kV or more. C1 inFigure 6 absorbs this charge andlimits the peak voltage that reachesthe LTC1535 to a safe value. As anexample, if a 1000pF source charged

to 10kV comes in contact with thecable, a single 10nF capacitor at C1will reduce the peak voltage to just1kV, decaying in less than 10msthrough R1–R4 and B1. 1kV is wellwithin the capabilities of the LTC1535.

Combining isolation, power and afully-compliant RS485 transmitter andreceiver, the LTC1535 provides a com-pact, cost-effective solution for isolatedserial data communications.

Figure 2. Positive-going double-pulse behavior: A = driver input,B = receiver output

Figure 3. Negative-going double-pulse behavior: A = driverinput, B = receiver output

Figure 4. Driver in fast slew mode, loaded with 5000’ of twice-terminated twisted pair

Figure 5. Driver in slow slew mode, loaded with 5000’ of twice-terminated twisted pair

Figure 6. Detecting wiring faults

R3**100k

R4**100k

C1†

10nF

R1*470k

R2*470k

2

LTC1535

GND2

A

Y

B

Z

SHIELDEDTWISTEDPAIRNETWORK

2

2

2

FLOATINGSHIELDCOMMON

EQUIPMENTSAFETYGROUND(EARTH)

IRC WCR1206(512) 992-7900IRC WCR1210PANASONIC ECQ-UZA103MV(201) 348-7522 JKL(818) 896-0019

*

**†

††

B1††

CN2RGLOW LAMP




DESIGN IDEAS

Sharp Gain Roll-Offs Using the LTC1562Quad Operational Filter IC (Part 3)

by Nello Sevastopoulos

This is the third in series of articlesdescribing applications of theLTC1562 quad Operational Filter™IC connected as a lowpass, highpass,notch or bandpass filter with addedstopband notches to increaseselectivity.

Parts 1 and 2 of the series (LinearTechnology VIII: 2, May 1998, pp. 28–31 and IX:1, February 1999, pp.31–35) described two notch tech-niques referred to as “feedforward.”In these techniques, the filter topol-ogy was modified to introducesumming junctions in the signal pathand passive components were care-fully selected to allow summed signalsto cancel each other at specificfrequencies.

Part 3 of this series describes a newnotch technique, the RC notch, thatcan be broadly applied to createnotches at any frequency. At the endof this series of articles, the RC notchtechnique will be compared to thefeedforward schemes and their

respective merits and drawbacks willbe discussed.

The principle of the RC notch tech-nique is shown in Figure 1, where one2nd order section of the LTC1562 isconnected as a basic all-pole 2ndorder lowpass/bandpass filter andits two outputs are summed directlyinto the next section by means ofresistor RIN2 and capacitor CIN2.

Note that, as V2B is the integral ofV1B, the lowpass output V2B lags thebandpass output V1B by 90 degreesor, conversely, V1B leads V2B by thesame amount. Furthermore, ascapacitor CIN2 adds another 90 degreesof phase lead to the current IBP(S), thetwo AC currents IBP(S) and ILP(S) willalways be 180 degrees out of phase. Itis quite trivial to show that a discretefrequency will always exist where themagnitude of these two currents willbe equal and a notch will be formed.

The frequency of the notch can beeasily derived by equating the magni-

tude of the two currents ILP(S) andIBP(S), Figure 1; that is: ILP(S) = IBP(S)

or V2B(s)/RIN2 = V1B(s)s CIN2 (1),

with V2B(s) = V1B(1/(sR1C)); (2);

R1 = 10k, C = 159.15pF, and s = jωSubstituting (2) into (1) and

solving for ω = ω(notch) =

1/√(RIN2 • CIN2 • R1 • C) (3)Equation 3 above can be rewritten

as a function of the center frequency,fO1, of the 2nd order filter section fromwhich it was derived:

fO1 = 1/(2πC√R1 • R2)f(NOTCH) = fN= fO1 • √(R21 • C)/(RIN2 • CIN2) (4)

Equation (4) allows a quick esti-mate of the notch frequency relativeto the fO. The magnitude R21 • Crelative to RIN2 • CIN2 will determinewhether the notch frequency is higherthan, equal to, or lower than the

–

+

1sCR1

–

+

1sCR1

R22

RIN2CIN2

CC

RQ2

R21

RIN1

RQ1

VIN

1/2 LTC1562

R1, C ARE PRECISION INTERNAL COMPONENTSR1 = 10k; C = 159.15pF

1

2

3

20

19

18

V1B

V2B

V1C

V2C

IBP(S)ILP(S)

Figure 1. Summing the BP output (V1A) and the lowpass output (V1B) into the inverting node ofthe next LTC1562 section to form an RC notch


DESIGN IDEAS

center frequency, fO, of the filter sec-tion from which it was derived.

The technique of Figure 1 can beexpanded to create high order filterswith stopband notches. This is shownin Figure 2, where all four sections ofan LTC1562 are used to create an 8thorder filter. The notches, as in Figure1, are formed by summing the twovoltage outputs (V2i, V1i) via (RINi,CINi), respectively into the invertingnode of the following section. Asshown, Figure 2 supports threenotches. A fourth notch can also beproduced if the V2D, V1D outputs aresummed into the inverting input of anexternal op amp.

If the filter output in Figure 2 istaken from node V2D and if the fre-quencies of all the notches are higherthan the highest center frequency ofany of the cascaded 2nd order sec-tions, the overall filter response is alowpass. As selective lowpass filtersare quite popular and relatively easyto design, a lowpass example will beused to illustrate the RC notch tech-nique. More sophisticated exampleswill be shown in future articles.

For the sake of thoroughness, thetransfer function of Figure 2 is shownbelow:

G(s) = H •∏ (s2 + ω2

Ni) ω2O4

∏ (s2 + sωOi αi + ω2Oi )

3

3

(5)

where H = (R24/RIN1) • (CIN2 • CIN3 •CIN4)/C3) (6)and where C is the internal integratorcapacitor.

The DC gain of the filter is theproduct of the DC gains of the cas-caded 2nd order sections and can bewritten by inspection:

(VOUT/VIN) = (R24/RIN4) • (R23/RIN3)• (R22 • RIN2) • (R21/RIN1) (7)

An Example, UsingLinear TechnologyFilterCAD™ for Windows®

Design a lowpass filter with a 100kHzpassband and 80dB or more attenu-ation at 200kHz. The passband gainshould be 0dB and the passbandripple should not exceed 0.2db. UseFilterCAD to synthesize the filter.

Table 1 illustrates the first try,with FilterCAD indicating a classical7th order lowpass elliptic filter. Thefilter can be realized by cascading

three out of four sections of theLTC1562 (Figure 3), where an exter-nal op amp is used to realize the thirdnotch. Note the cascading sequenceof 2nd order sections illustrated inFigure 3. The unused fourth sectionof the LTC1562 could perform anotherfilter function, which could be inde-pendent from the above lowpass filterdesign.

The following step-by-step proce-dure shows how to calculate theexternal passive components ofFigure 3.

1. From the LTC1562 data sheet,calculate all the R2is and RQis:

R2i = (100kHz/fOi)2 • 10k; RQi = Qi •√(10k • R2i) (8)(i = 1, 2, 3 …)

R21 = 17.37k; R22 = 10.387k;R23 = 8.176kRQ1 = 9.62k; RQ2 = 15.846k;RQ3 = 49.087k2. Calculate resistors RINi and

capacitors CINi.RINi should be chosen indepen-

dently from CINi by considering DCgains; CINi will be calculated to makethe time constant RINi • CINi yield theappropriate notch frequency. As thereare fewer commercially availablecapacitor values than resistors, thetheoretical value of CINi will be rounded

20

19

18

16

15

13

12

11

1

2

3

5

6

8

9

10

INV C

V1 C

V2 C

V–

AGND

V2 D

V1 D

INV D

INV B

V1 B

V2 B

V+

SHDN

V2 A

V1 A

INV A

RIN2

RQ2

R22

R24

RQ4

RIN4

RQ3

R23

RQ1

R21

VIN

5V0.1µF 0.1µF

–5V*

VOUT

*V– ALSO AT PINS 4, 7, 14 AND 17

LTC1562

RIN1

CIN2

CIN3

RIN3

CIN4

fO Q fN QN epyT

3e3233.16 ——— ——— ——— 1PL

3e0578.57 7927.0 3e5154.402 ——— NPL

3e7911.89 8455.1 3e7330.942 ——— NPL

3e8095.011 7824.5 3e4344.534 ——— NPL

Filter Response: EllipticFilter Type: Lowpass

Order: 7

Passband Ripple: 0.010dBStopband Attenuation: 80.000dBPassband Frequency: 100.000kHzStopband Frequency: 200.000kHz

Table 1. FilterCAD synthesis of classical 7th order elliptic response

Figure 2. Cascading all four sections of an LTC1562 to form an 8th order responsewith three notches

Windows is a registered trademark of Microsoft Corp.


DESIGN IDEAS

off to its closest commercially availablevalue; RINi will then be appropriatelyadjusted to maintain the requiredvalue of the time constant RINi • CINi.This algorithm is summarized below.

Set RINi; Calculate CINi from thenotch expression (3) or (4); Round offthe theoretical value of CINi to theclosest commercially available value;recalculate RINi so that (RINi • CINi)theoretical = (RINi • CINi) commerciallyobtainable.

Optimally setting RINi resistors iseasier said than done. One straight-forward method would allow unity DCgain at each cascaded stage, that isRINi = R2i. This could work if the filteris realized from medium Q stages (forexample, Qs less than 1), but for Qsmuch higher than 0.707, the maxi-mum AC gain of a lowpass 2nd ordersection is approximately (Q • DC gain);an internal node could have muchhigher gain than the filter output.This could cause internal clipping thatcould limit the filter’s dynamic range.

A computer program can also bewritten to calculate the AC gain ateach internal node and then make awise choice for RINi resistors. Filter-

CAD for Windows already performsthis function for the switched capaci-tor products (LTC1060, LTC1061,LTC1064, LTC1067, LTC1068) and,in the near future, it will also supportLTC’s newer RC active products(LTC1562, et al.).

For the purpose of this article, wewill use a simple rule of thumb thatworks fairly well, at least for lowpasselliptic filters: For Qs less than 2, setthe DC gain of the second order sec-tion equal to unity, for Qs higher than2 and less than 5, set the DC gainequal to 0.5V/V and for Qs higherthan 5 and less than 8, set the DCgain equal to 0.35V/V.

2a: Set: RIN1 = R21 = 17.37k; thissets the DC gain of the lowpassnode V21 of the first stage to0dB.

2b: Set: RIN2 = R22 = 10.387k; thissets the DC gain of the lowpassnode V22 with respect to V21equal to 0db. The AC gain at V22will peak at approximately thecenter frequency, fO2, and themagnitude of the peak will beapproximately Q2 times the DC

gain. The gain at V22 withrespect to VIN, however, will stillbe close to 0dB.Solve for CIN2 by using (4) above:

CIN2 = ((R21 • C)/(RIN2)) • (fO1/fN1)2

= 36.655pF (9)Choose CIN2 = 39pF (standard

capacitor value) and readjust the valueof RIN2, such that

RIN2(REAL) = (36.655pF/39pF) •(10.387k) = 9.762k (10)2c: Set RIN3 = 2 • R23 = 16.352k

and calculate CIN3 from (9) above:CIN3 = ((R22 • C)/RIN3) • (fO2/fN2)2 =

15.695pFChoose CIN3 = 15pF (standard ca-

pacitor value) and readjust the valueof RIN3 as above (10).

RIN3(REAL) = (15.695pF/15pF) •(16.352k) = 17.1k

2d: Calculate the last stage(external op amp) passivecomponents: CRP, RG, RIN4 andCIN4.

This is slightly more cumbersomethan the previous calculations butthe simple algorithm outlined belowwill make this task quite intuitive:

Calculate the desired ratio ofRG/RIN4 by considering the overall DCgain of the lowpass filter. Start withan arbitrary, yet reasonable, value forRG, calculate RIN4 and also calculateCRP to realize the 7th pole (real pole) ofthe filter (see Table 1). Make sure thatthe value of RIN4 is not too small (itshould be greater than 2k). Adjustthe value of RG to accommodate acommercially available capacitor, CRP.

20

19

18

16

15

13

12

11

1

2

3

5

6

8

9

10

INV C

V1 C

V2 C

V–

AGND

V2 D

V1 D

INV D

INV B

V1 B

V2 B

V+

SHDN

V2 A

V1 A

INV A

RIN2 9.76k

RQ2 15.8k

R22 10.5k

RIN4 10.5k

RQ3 48.7k

R23 8.25k

RQ1 9.53k

R21 17.4k

VIN

5V0.1µF 0.1µF

–5V*

VOUT

*V– ALSO AT PINS 4, 7, 14 AND 17

LTC1562

RIN1 18.2k

CIN2 39pF

CIN315pF

RIN3 16.9k

CIN4

8pF

–

+

RG 21.5k

CRP 120pF

LT1360

FREESECTION

20

0

–20

–40

–60

–80

–100

–12010k 100k 1M 10M

GAIN

(dB)

FREQUENCY (Hz)

Figure 3. Cascading three sections of an LTC1562 to form a 7th order lowpass elliptic response

Figure 4. Measured gain response of Figure2’s circuit



DESIGN IDEAS

Using the LT1719 Comparator forLow Dispersion Sine Wave toSquare Wave Conversion by Joseph G. Petrofsky

The LT1719 is an UltraFastTM,4.5ns comparator with separate ana-log and digital supplies. Both suppliescan be as low as 2.7V, or the LT1719can be used as a level translator inmixed 3V/5V systems. The propaga-tion delay of comparators is typicallyspecified for a 100mV step, with somefraction of that for overdrive. But inmany signal-processing applications,such as in communications, the goalis to convert a sine wave, such as acarrier, to a square wave for use as atiming clock. The desired behavior isfor the output timing to be dependentonly on the input timing. No disper-sion or phase shift should occur as afunction of the input amplitude, asthis would result in AM to FM conver-sion. The LT1719 is an excellent choicein these applications, particularlywhen the input signal is larger than100mVP-P.

Test CircuitThe circuit of Figure 1 was used totest an LT1719-based sine wave tosquare wave converter. The ±5V sup-plies on the input allow very largeinput swings; the 3V logic supplykeeps the output swing small to mini-

mize coupling back into the inputs.Characterization of the delay, whichvaries just a fraction of a nanosecondover a decade of input amplitudechange, is not simple. A fast oscillo-scope can have ±500ps of variation inany given channel. This can be cali-brated by swapping input and outputchannels and averaging the readingsif the two signals allow the samevertical scale factors. But for a mea-surement of delay changes over adecade or more of amplitude range,accuracy is degraded by delay depen-dence on the gain settings of theoscilloscope’s vertical path.

To characterize the delay, anHP4195 Spectrum/Network Analyzerwas used to look at the phase of theoutput relative to the input (Test/Ref). Because the HP4195 is a spec-trum/network analyzer, it can rejectthe harmonics of the output squarewave, unlike some network-only ana-lyzers. The phase of the fundamentalcomponent of the LT1719 output canbe slightly affected by the exact natureof any overshoot or undershoot of thetransitions, so a pair of antiparalleldiodes is used to clip off these por-tions of the output waveform. The

rest of the circuitry on the output is afilter whose exact behavior does notaffect the measurement because thesame amplitude and frequency signalwill always be present there and onlyrelative changes in phase will beexamined.

The input signal is terminated in aresistive –12dB pad that creates thereference signal for the analyzer. TheHP4195 maximum oscillator level is15dBm or 3.56VP-P. The 1:2 trans-former steps this up to 7.12VP-Pdifferential at the DUT input. Anamplifier could be used to boost theamplitude further, but distortion inthe amplifier could result in phaseerrors because the LT1719 willrespond to the zero-crossings,whereas the HP4195 will respond tothe phase of the fundamental. Theresults without a transformer,grounding the unused comparatorinput, were unchanged but for theloss of 6dB.

ResultsFigure 2 shows the time delay of thesine wave to square wave converterresponding to an amplitude sweep at10MHz. The delay is calculated as:

tDELAY = tDELAY|0dBm – (θ – θ|0dBm)

360° • 10MHz

–

+

SOURCE REF TEST

LT1719

HP4195

TM04-1*

75Ω100Ω

50Ω

1000pF 62Ω 1N5711 ×2 51Ω 51Ω

200pF

5V 3V

–5V

Z = 50Ω

SHDN

*MINI CRCUITS (718) 934-4500

Figure 1. Sine to square wave converter schematic


DESIGN IDEAS

where θ is the phase in degrees mea-sured by the network analyzer andtDELAY|0dBm is the absolute delay at0dB input amplitude, which was mea-sured with a fast oscilloscope usingthe calibration method described ear-lier. The LT1719 delay changes just0.65ns over the 26dB amplitude

range; 2.33 degrees at 10MHz. Thedelay is particularly flat, yieldingexcellent AM rejection, from –5dBmto 10dBm, a common range for RFsignal levels.

With small input signals, the hys-teresis of the LT1719 (3.5mV typ.)and increased propagation delay makethe LT1719 act like a comparatorwith a 12mV hysteresis span. In otherwords, a 12mVP-P sine wave at 10MHzwill barely toggle the LT1719, butwith 90° of phase lag or 25ns addi-tional delay. Above 5VP-P at 10MHz,the LT1719 delay starts to decreasedue to the internal capacitive feed-forward in the design of the inputstage. Unlike some comparators, theLT1719 will not falsely anticipate achange in input polarity, but the feed-forward is enough to make a transitionpropagate through the LT1719 fasteronce the input polarity does change.

At frequencies higher than 10MHz,attention to detail in the physicalconstruction of circuits becomes par-ticularly important. With a poorlayout, the output toggle action cancapacitively or inductively couple backto the input signal, causing distor-tion. This must be avoided in order tomeasure the actual performance ofthe comparator. The LT1719 pinouthas been optimized to shield the inputsignals from the digital signals withtwo intervening power supply pins.

ConclusionThe new LT1719 comparator can eas-ily be used to create a low power, highperformance, sine wave to squarewave converter. The fast, 4.5ns delaybarely changes with input amplitudefluctuations. The delay is particularlyflat, for excellent AM rejection, from–5dBm to 10dBm.

INPUT AMPLITUDE (dBm)

DELA

Y (n

s)5

4

3

2

1

0–15 –10 –5 0 5 10 15

VCC = 5VVEE = –5V+VS = 3Vf = 10MHz

400m

V P-P

INTO

DUT

4VP-

P IN

TO D

UT

Calculate CIN4 as in the previous stepsand adjust the value of RIN4. Thechoice of capacitors will most likelyalter the original ratio of RG/RIN4, soreadjust the value of the input resis-tor RIN1 to restore the DC gain of thefiler to its original value.

2d-1. Set the overall gain of thelowpass filter to its desired value(here we are assuming 1V/V) andcalculate the ratio of RG/RIN4:

(VOUT/VIN) DC = (RG/RIN4) • (R23/RIN3)• (R22/RIN2) • (R21/RIN1) = 1V/V (11)RG/RIN4 = 1.9656

2d-2. Start with an arbitrary, yetreasonable value, for example RG= 20k, and solve for CRP to obtainthe 7th real pole frequency of61.332kHz.CRP = 129.75pF; choose CRP = 120pF

and adjust RG to 21.625kSolve for RIN4 = RG/1.956 = 11.05k

2d-3. Calculate CIN4 = ((R23 • C)/RIN4) • (fO3/fN3)2 = 7.595pFChoose CIN4 = 8pF (standard value)

and readjust RIN4 toR I N 4 ( R E A L ) = (7 .595pF/8pF ) •

(11.05k) = 10.49k

2d-4 As the new ratio (RG/RIN4) haschanged slightly [(RG/RIN4)REAL =2.06 instead of 1.9656], adjustRIN1 to reestablish 0dB of DCgain: RIN1(REAL) = 17.37k •(2.06/1.9656) = 18.2k.

Experimental ResultsThe resistor values derived above arefirst rounded off to their nearest 1%values, as shown below:1% surface mount resistors, type0805:

RIN1 = 18.2k, R21 = 17.4k, RQ1 = 9.53kRIN2 = 9.76k, R22 = 10.5k, RQ2 = 15.8kRIN3 = 16.9k, R23 = 8.25k, RQ3 = 48.7kRIN4 = 10.5k, RG = 21.5k

The choice of the above 1% valuesincreases the DC gain by 0.24dB sothe value of RIN1 is raised from 18.2kto 18.7k (1%) to restore the 0dB valueof the passband gain.

Resistors RQ2 and RQ3 are alsoslightly changed to predistort the val-ues of Q2 and Q3, as shown in theLTC1562 data sheet curve (Q error vsnominal fO). This is done by loweringthe values of RQ2 and RQ3 by the samepercentages as the Q error. The newvalues are RQ2 = 15k (1%) and RQ3 =45.3k (1%).

The filter of Figure 2 was con-structed with the resistor valuesshown above and with 5% type X7Rsurface mount capacitors:

CIN2 = 39pF, CIN3 = 15pF, CIN4 = 8pF,CRP = 120pF

The act ive devices are theLTC1562A and the LT1360 op amp.Figure 4 shows the filter gain response.The measured passband error is0.15dB and the total output RMSnoise is 60µVRMS. With a dual 5Vsupply, the filter can easily provide a5V peak-to-peak signal with a 90dBsignal-to-noise ratio and better than0.01% distortion. The attenuation ofthe filter remains below 80dB for inputfrequencies up to 6MHz.

ConclusionA simple method of how to systemati-cally synthesize and design a highperformance lowpass elliptic filter isfully illustrated above. The experi-mental results match the theoreticalcalculations provided; the Q-settingresistors are slightly adjusted toaccount for the small Q errors of theLTC1562A.

Figure 2. Time delay vs sine wave inputamplitude

LTC1562 notches, continued from page 33


This is pretty hard to determine (readimpossible) if the peak-to-peak out-put noise is larger than this number.As a practical matter the best labora-tory reference available has long-termdrift of 1.5µ V/mo. This performanceis only available from the very bestsubsurface Zener references usingspecialized heating techniques.

The LT1461 long-term drift datawas taken with parts that were sol-dered onto PC boards as in a “realworld” application. The boards were

Figure 4. Long-term drift

HOURS

–50

ppm

50

150

250

0

100

200

400 800 1200 1600 2000200 600 1000 1400 18000

LT1461S8-2.53 TYPICAL PARTS SOLDERED ONTO PCBTA = 30°C

then placed in a constant-tempera-ture oven with TA = 30°C and theiroutputs were scanned regularly andmeasured with an 8.5 digit DVM.Figure 4 shows the long-term drift ofthree typical LT1461S8-2.5s solderedinto a PC board. This is the bestperformance we have measured onan IC voltage reference that is notbased on a subsurface Zener.

ConclusionThe LT1461 series reference meetsthe growing need for low power, highaccuracy and low temperature coef-ficient, while simultaneously servingmicropower precision regulatorapplications. This new bandgapreference comes in the 8-lead SOpackage. It is available in 2.5V andwill be available in 4.096V, 5.0V and10V options.

LT1461, continued from page 5

LTC1929, continued from page 28

CONTINUATIONS



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12V BUCKINDUCTOR CURRENT

1A/DIV

5V BUCKINDUCTOR CURRENT

1A/DIV

OUTPUT RIPPLEVOLTAGE50mV/DIV

1µs/DIVFigure 2. Input currents vs load currentfor Figure 1’s circuit

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

00 1 2 3 4 5 6 7

LOAD CURRENT (A)

INPU

T CU

RREN

T (A

)

5V INPUT CURRENT

12V INPUT CURRENT

VIN1 = 5VVIN2 = 12VVOUT = 2.8VfS = 300kHz

Figure 3. Ripple current and voltage waveforms

Figure 1 shows the schematic dia-gram of the complete power supply.The switching frequency is about300kHz per-channel for an effectiveoutput ripple frequency of 600kHz.The inductors in both stages are 7µ H.The current sense resistor is 0.007Ωfor each channel.

Test ResultsThe overall efficiency is above 90%from 0.5A to 6A. Figure 2 shows thedistribution of two input currents asthe load current varies. The maxi-mum input currents for the 5V and

12V sources are 1.66A and 0.84A,respectively, which are well below thePCI connector’s current limits. Fig-ure 3 shows the waveforms of theinductor ripple currents and outputripple voltages. Note the ripplecancellation phenomenon. The peak-to-peak switching ripple voltage atthe output terminal is only 50mVP-Pwith one 1500µ F/6.3V aluminumelectrolytic capacitor. If two buck cir-cuits are synchronized in phase, theripple voltage will be 70mVP-P, almosta 50% increase.

ConclusionThe PolyPhase technique reduces theoutput ripple voltage without increas-ing the switching frequency. Highefficiency can be obtained for lowoutput voltage applications. TheLTC1929 PolyPhase controller pro-vides a small, low cost solution formulti-input applications. If more thantwo inputs are needed, use theLTC1629 rather than the LTC1929.Multiple LTC1629s can be config-ured for 3-, 4-, 6- or even 12-phaseoperation.


NEW DEVICE CAMEOS

New Device CameosLT1637: RuggedRail-To-Rail Op AmpDelivers 1.1MHz Gain-Bandwidth Product from250µA Supply CurrentThe LT1637 is a rugged op amp; it hasOver-the-Top inputs, rail-to-rail out-put, shutdown and reverse supplyprotection. The LT1637 achieves again-bandwidth product of 1.1MHzwhile drawing less than 250µ A ofquiescent current and operates on allsingle and split supplies with a totalvoltage of 2.7V to 44V. The output ofthe LT1637 will swing to within 3mVof V– with less than 1mV of inputoverdrive, making it ideal for sensingvoltages close to ground in single-supply systems. The LT1637 is easilyshut down, with a shutdown pin cur-rent of less than 5µA. In shutdown,the LT1637’s output is high imped-ance and its quiescent current dropsto only 3µA. The LT1637 draws virtu-ally no current for reverse supplies ofup to 25V. Unlike most micropowerop amps, the LT1637 can drive heavyloads: its rail-to-rail output drives25mA. The LT1637 is unity-gain stableinto all capacitive loads up to 220pF(4700pF when 0.22µF and 150Ω com-pensation is used).

The LT1637 has a unique inputstage that operates and remains highimpedance when above the positivesupply. The inputs take 44V bothdifferential and common mode, evenwhen operating on a 3V supply. Built-in resistors protect the inputs forfaults below the negative supply up to22V. There is no phase reversal of theoutput for inputs 5V below VEE or 44Vabove VEE, independent of VCC.

The LT1637 op amp is available inthe 8-pin MSOP, 8-pin SO and PDIPpackages.

The LTC1655L: Smallest16-Bit Voltage-Output DACSaves Board SpaceThe LTC1655L is the smallest 16-bitvoltage-output DAC available today.It is available in an 8-pin SO package

and includes an internal 1.25V refer-ence and a rail-to-rail voltage outputamplifier. The LTC1655L is guaran-teed to be monotonic over theindustrial temperature range with atypical differential nonlinearity of0.3LSB. It is pin compatible with Lin-ear Technology’s 12- and 14-bit DACfamily, allowing an easy upgrade path.The LTC1655L can operate on a widesupply range of 2.7V to 5.5V, dissipat-ing 1.6mW from a 3V supply. Theoutput swings from 0V to 2.5V whenusing the internal reference. The ref-erence pin can be overdriven to ahigher voltage for a wider output swing.

The LTC1655L has a flexible, SPI/QSPI and MICROWIRE™ compatible,3-wire serial interface. A DOUT pinallows daisy chaining. The SCK pin isequipped with an internal Schmitttrigger for noise immunity, allowingdirect optocoupler interfacing to thepart. The logic inputs are TTL levelcompatible. The rail-to-rail voltageoutput will swing to within a fewmillivolts of either supply rail whenunloaded and is capable of drivingcapacitive loads of up to a 1000pFwithout oscillating.

LTC1798 Low DropoutReferences Draw Only 6.5µAof Supply CurrentThe LTC1798-2.5, LTC1798-3,LTC1798-4.1 and LTC1798-5 are6.5µA series voltage references withguaranteed 0.15% accuracy, a maxi-mum of 40ppm/°C temperature driftand 200mV dropout voltage that donot require an output capacitor forstability. An adjustable version, theLTC1798, is also available.

This family of references operateson supplies as high as 12.6V. Theycan source up to 10mA and sink up to2mA, making them ideal for precisionregulator applications. They usetrimmed thin-film resistors and cur-vature compensation to achieve highoutput accuracy and low tempera-ture coefficient.

The LTC1798 family of series refer-ences provides supply current andpower dissipation advantages overshunt references that must idle theentire load current to operate. TheLTC1798 series is available in the8-pin SO package.

LTC1647 Device-Bay ChipHot Swaps PeripheralsThe LTC1647 dual Hot Swap control-ler allows a board to be safely insertedinto and removed from a live back-plane. Equally at home on either sideof the connector, the LTC1647 can actfrom the host side or reside on the hotswappable product. It is particularlywell suited for USB and Device Bayapplications.

The two sections of the LTC1647operate independently and eachfeatures an electronic circuit breaker,a fault flag and an ON/OFF controlthat doubles as a programmableundervoltage lockout. Each sectiondrives an N-channel pass transistor,allowing any two supply voltages from2.7V to 15V to be ramped at a con-trolled rate. The LTC1647 operatesunder the control of a microprocessoror autonomously, including recover-ing from fault conditions.

Several package options offer achoice of control and fault pin con-figurations; 8-pin SO and 16-leadSSOP packages are available.

LT1812: 3mA, 100MHz,750V/µs OperationalAmplifier with ShutdownThe LT1812 is a low power, high speed,very high slew rate operational ampli-fier with excellent DC performance.Compared to other devices with simi-lar bandwidth, the LT1812 featuresreduced supply current, lower inputoffset voltage (0.5mV typical) and lowerinput bias current (1µA typical). Apower-saving shutdown feature re-duces supply current to 50µA. Thecircuit topology is a voltage feedbackamplifier with the slewing character-istics of a current feedback amplifier.Both inputs are high impedance, likethose of a voltage feedback amplifier.However, the slew rate is a function ofthe input step as well as the gainMICROWIRE is a trademark of National Semiconductor

Corp.


NEW DEVICE CAMEOS

Information furnished by Linear Technology Corporationis believed to be accurate and reliable. However, LinearTechnology makes no representation that the circuitsdescribed herein will not infringe on existing patent rights.

configuration, much like a currentfeedback amplifier.

The LT1812 is specified at both±5V and with a single 5V supply. Theinput common mode range is sym-metrical at ±3.5V minimum (±5Vsupply) and at1.5V–3.5V minimumfor a single 5V supply. The outputdrives a 100Ω load to ±3.5V with ±5Vsupplies. On a single 5V supply, theoutput swings from 1.1V to 3.9V witha 100Ω load connected to 2.5V. Theamplifier is stable over a wide range ofcapacitive loads, from no load to1000pF, which makes it useful inbuffer and cable-driver applications.

The LT1812 is available in the 8-pin SO package.




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LT1721 Quad, 4.5ns,Comparator in an SO-8 SizedPackage Works Down to 2.7VThe LT1721 is an UltraFastTM quadcomparator optimized for single-sup-ply operation with a supply voltagerange of 2.7V to 6V. The LT1721 isoffered in the 16-lead SO package, aswell as the 16-lead GN, which is thesame size as an SO-8.Propagation delay is just 4.5ns typi-cal (6.5ns max) with 20mV overdriveand 7ns typical (10ns max) with 5mVoverdrive. Quiescent current is only4mA typical (7mA max) per compara-tor. The input voltage range extendsfrom 100mV below ground to 1.2Vbelow the supply voltage. Phase-re-versal circuitry prevents false outputstates when the inputs are driveneven further below ground.

Internal hysteresis makes theLT1721 easy to use even with slowlymoving input signals. Input DC speci-fications feature an offset voltage of1mV typical (3mV max.) with full-temperature range limits on all DCspecifications including input hys-teresis and trip points. The rail-to-railoutputs can directly interface to TTLand CMOS. Alternatively, their sym-metric output drive can be harnessedfor analog applications or easy trans-lation to other logic levels.

The LT1721 is a quad version ofthe LT1720 dual comparator. Theseproducts, along with the LT1719single comparator, constitute an easy-to-use, high speed comparator familythat features small size, low power,and low cost.

For further information on anyof the devices mentioned in thisissue of Linear Technology, usethe reader service card or callthe LTC literature servicenumber:

1-800-4-LINEAR

Ask for the pertinent data sheetsand Application Notes.


DESIGN TOOLS

Technical Books1990 Linear Databook, Vol I —This 1440 page collec-tion of data sheets covers op amps, voltage regulators,references, comparators, filters, PWMs, data conver-sion and interface products (bipolar and CMOS), in bothcommercial and military grades. The catalog featureswell over 300 devices. $10.00

1992 Linear Databook, Vol II — This 1248 page supple-ment to the 1990 Linear Databook is a collection of allproducts introduced in 1991 and 1992. The catalogcontains full data sheets for over 140 devices. The 1992Linear Databook, Vol II is a companion to the 1990Linear Databook, which should not be discarded.

$10.00

1994 Linear Databook, Vol III —This 1826 page supple-ment to the 1990 and 1992 Linear Databooks is acollection of all products introduced since 1992. A totalof 152 product data sheets are included with updatedselection guides. The 1994 Linear Databook Vol III is acompanion to the 1990 and 1992 Linear Databooks,which should not be discarded. $10.00

1995 Linear Databook, Vol IV —This 1152 page supple-ment to the 1990, 1992 and 1994 Linear Databooks is acollection of all products introduced since 1994. A totalof 80 product data sheets are included with updatedselection guides. The 1995 Linear Databook Vol IV is acompanion to the 1990, 1992 and 1994 Linear Databooks,which should not be discarded. $10.00

1996 Linear Databook, Vol V —This 1152 page supple-ment to the 1990, 1992, 1994 and 1995 Linear Databooksis a collection of all products introduced since 1995. Atotal of 65 product data sheets are included with updatedselection guides. The 1996 Linear Databook Vol V is acompanion to the 1990, 1992, 1994 and 1995 LinearDatabooks, which should not be discarded. $10.00

1997 Linear Databook, Vol VI —This 1360 page supple-ment to the 1990, 1992, 1994, 1995 and 1996 LinearDatabooks is a collection of all products introducedsince 1996. A total of 79 product data sheets areincluded with updated selection guides. The 1997 LinearDatabook Vol VI is a companion to the 1990, 1992,1994, 1995 and 1996 Linear Databooks, which shouldnot be discarded. $10.00

1999 Linear Databook, Vol VII — This 1968 pagesupplement to the 1990, 1992, 1994, 1995, 1996 and1997 Linear Databooks is a collection of all product datasheets introduced since 1997. A total of 120 productdata sheets are included, with updated selection guides.The 1999 Linear Databook is a companion to the previ-ous Linear Databooks, which should not be discarded.

$10.00

1990 Linear Applications Handbook, Volume I —928 pages full of application ideas covered in depth by40 Application Notes and 33 Design Notes. This catalogcovers a broad range of “real world” linear circuitry. Inaddition to detailed, systems-oriented circuits, this hand-book contains broad tutorial content together with liberaluse of schematics and scope photography. A specialfeature in this edition includes a 22-page section onSPICE macromodels. $20.00

1993 Linear Applications Handbook, Volume II —Continues the stream of “real world” linear circuitryinitiated by the 1990 Handbook. Similar in scope to the1990 edition, the new book covers Application Notes 40through 54 and Design Notes 33 through 69. References

and articles from non-LTC publications that we havefound useful are also included. $20.00

1997 Linear Applications Handbook, Volume III —This 976 page handbook maintains the practical outlookand tutorial nature of previous efforts, while broadeningtopic selection. This new book includes ApplicationNotes 55 through 69 and Design Notes 70 through 144.Subjects include switching regulators, measurementand control circuits, filters, video designs, interface,data converters, power products, battery chargers andCCFL inverters. An extensive subject index referencescircuits in LTC data sheets, design notes, applicationnotes and Linear Technology magazines. $20.00

1998 Data Converter Handbook — This impressive 1360page handbook includes all of the data sheets, applica-tion notes and design notes for Linear Technology’sfamily of high performance data converter products.Products include A/D converters (ADCs), D/A convert-ers (DACs) and multiplexers—including the fastestmonolithic 16-bit ADC, the 3Msps, 12-bit ADC with thebest dynamic performance and the first dual 12-bit DACin an SO-8 package. Also included are selection guidesfor references, op amps and filters and a glossary of dataconverter terms. $10.00

Interface Product Handbook — This 424 page hand-book features LTC’s complete line of line driver andreceiver products for RS232, RS485, RS423, RS422,V.35 and AppleTalk® applications. Linear’s particularexpertise in this area involves low power consumption,high numbers of drivers and receivers in one package,mixed RS232 and RS485 devices, 10kV ESD protectionof RS232 devices and surface mount packages.

Available at no charge

Power Management Solutions Brochure — This 96page collection of circuits contains real-life solutions forcommon power supply design problems. There are over70 circuits, including descriptions, graphs and perfor-mance specifications. Topics covered include batterychargers, desktop PC power supplies, notebook PCpower supplies, portable electronics power supplies,distributed power supplies, telecommunications andisolated power supplies, off-line power supplies andpower management circuits. Selection guides are pro-vided for each section and a variety of helpful designtools are also listed for quick reference.

Available at no charge.

Data Conversion Solutions Brochure — This 64 pagecollection of data conversion circuits, products andselection guides serves as excellent reference for thedata acquisition system designer. Over 60 products areshowcased, solving problems in low power, small sizeand high performance data conversion applications—with performance graphs and specifications. Topicscovered include ADCs, DACs, voltage references andanalog multiplexers. A complete glossary defines dataconversion specifications; a list of selected applicationand design notes is also included.

Available at no charge

Telecommunications Solutions Brochure —This 76page collection of application circuits and selectionguides covers a wide variety of products targeted fortelecommunications. Circuits solve real life problemsfor central office switching, cellular phones, high speedmodems, base station, plus special sections covering–48V and Hot SwapTM applications. Many applications

highlight new products such as Hot Swap controllers,power products, high speed amplifiers, A/D converters,interface transceivers and filters. Includes a telecom-munications glossary, serial interface standards, protocolinformation and a complete list of key application notesand design notes. Available at no charge.

Applications on DiskFilterCAD™ 2.0 CD-ROM — This CD is a powerful filterdesign tool that supports all of Linear Technology’s highperformance switched capacitor filters. Included is Fil-terView™, a document navigator that allows you toquickly find Linear Technology monolithic filter datasheets, the FilterCAD manual, application notes, designnotes and Linear Technology magazine articles. It doesnot have to be installed to run FilterCAD. It is notnecessary to use FilterView to view the documents, asthey are standard .PDF files, readable with any versionof Adobe Acrobat™. FilterCAD runs on Windows® 3.1 orWindows 95. FilterView requires Windows 95. TheFilterCAD program itself is also available on the web andwill be included on the new LinearView™ CD.


Noise Disk — This IBM-PC (or compatible) programallows the user to calculate circuit noise using LTC opamps, determine the best LTC op amp for a low noiseapplication, display the noise data for LTC op amps,calculate resistor noise and calculate noise using specsfor any op amp. Available at no charge

SPICE Macromodel Disk — This IBM-PC (or compat-ible) high density diskette contains the library of LTC opamp SPICE macromodels. The models can be used withany version of SPICE for general analog circuit simula-tions. The diskette also contains working circuit examplesusing the models and a demonstration copy of PSPICE™by MicroSim. Available at no charge

SwitcherCAD™ — The SwitcherCAD program is a pow-erful PC software tool that aids in the design andoptimization of switching regulators. The program cancut days off the design cycle by selecting topologies,calculating operating points and specifying componentvalues and manufacturer’s part numbers. 144 pagemanual included. $20.00

SwitcherCAD supports the following parts: LT1070 se-ries: LT1070, LT1071, LT1072, LT1074 and LT1076.LT1082. LT1170 series: LT1170, LT1171, LT1172 andLT1176. It also supports: LT1268, LT1269 and LT1507.LT1270 series: LT1270 and LT1271. LT1371 series:LT1371, LT1372, LT1373, LT1375, LT1376 and LT1377.

Micropower SwitcherCAD™ — The MicropowerSCADprogram is a powerful tool for designing DC/DC con-verters based on Linear Technology’s micropowerswitching regulator ICs. Given basic design parameters,MicropowerSCAD selects a circuit topology and offersyou a selection of appropriate Linear Technology switch-ing regulator ICs. MicropowerSCAD also performs circuitsimulations to select the other components which sur-round the DC/DC converter. In the case of a batterysupply, MicropowerSCAD can perform a battery lifesimulation. 44 page manual included. $20.00

MicropowerSCAD supports the following LTC micro-power DC/DC converters: LT1073, LT1107, LT1108,LT1109, LT1109A, LT1110, LT1111, LT1173, LTC1174,LT1300, LT1301 and LT1303.


DESIGN TOOLS

Linear Technology Magazine • November 1999© 1999 Linear Technology Corporation/Printed in U.S.A./

LINEAR TECHNOLOGY CORPORATION1630 McCarthy BoulevardMilpitas, CA 95035-7417(408) 432-1900 FAX (408) 434-0507www.linear-tech.comFor Literature Only: 1-800-4-LINEAR

Acrobat is a trademark of Adobe Systems, Inc.; Windowsis a registered trademark of Microsoft Corp.; Macintoshand AppleTalk are registered trademarks of Apple Com-puter, Inc. PSPICE is a trademark of MicroSim Corp.

CD-ROM CatalogLinearView — LinearView™ CD-ROM version 3.1 isLinear Technology’s latest interactive CD-ROM. It al-lows you to instantly access thousands of pages ofproduct and applications information, covering LinearTechnology’s complete line of high performance analogproducts, with easy-to-use search tools.

The LinearView CD-ROM includes the complete productspecifications from Linear Technology’s Databook li-brary (Volumes I–VI) and the complete ApplicationsHandbook collection (Volumes I–III). Our extensivecollection of Design Notes and the complete collectionof Linear Technology magazine are also included.

A powerful search engine built into the LinearView CD-ROM enables you to select parts by various criteria,such as device parameters, keywords or part numbers.All product categories are represented: data conversion,references, amplifiers, power products, filters and inter-face circuits. Up-to-date versions of Linear Technology’ssoftware design tools, SwitcherCAD, Micropower

DESIGN TOOLS, continued from page 39 SwitcherCAD, FilterCAD, Noise Disk and Spice Macro-model library, are also included. Everything you need toknow about Linear Technology’s products and applica-tions is readily accessible via LinearView. LinearViewruns under Windows 95 and Macintosh® System 8.0 orlater.


World Wide Web SiteLinear Technology Corporation’s customers can nowquickly and conveniently find and retrieve the latesttechnical information covering the Company’s productson LTC’s Internet web site. Located at www.linear-tech.com, this site allows anyone with Internet accessand a web browser to search through all of LTC’stechnical publications, including data sheets, applica-tion notes, design notes, Linear Technology magazineissues and other LTC publications, to find informationon LTC parts and applications circuits. Other areaswithin the site include help, news and information aboutLinear Technology and its sales offices.

Other web sites usually require the visitor to downloadlarge document files to see if they contain the desiredinformation. This is cumbersome and inconvenient. Tosave you time and ensure that you receive the correctinformation the first time, the first page of each datasheet, application note and Linear Technology maga-zine is recreated in a fast, download-friendly format.This allows you to determine whether the document iswhat you need, before downloading the entire file.

The site is searchable by criteria such as part numbers,functions, topics and applications. The search is per-formed on a user-defined combination of data sheets,application notes, design notes and Linear Technologymagazine articles. Any data sheet, application note,design note or magazine article can be downloaded orfaxed back. (files are downloaded in Adobe Acrobat PDFformat; you will need a copy of Acrobat Reader to viewor print them. The site includes a link from which youcan download this program.)

InternationalSales OfficesFRANCELinear Technology S.A.R.L.Immeuble “Le Quartz”58 Chemin de la Justice92290 Chatenay MalabryFrancePhone: 33-1-41079555FAX: 33-1-46314613

GERMANYLinear Technology GmbHOskar-Messter-Str. 24D-85737 IsmaningGermanyPhone: 49-89-962455-0FAX: 49-89-963147

HONG KONGLinear Technology Corp. Ltd.Unit 2109, Metroplaza Tower 2223 Hing Fong RoadKwai Fong, N.T., Hong KongPhone: 852-2428-0303FAX: 852-2348-0885

JAPANLinear Technology KK5F NAO Bldg.1-14 Shin-Ogawa-cho Shinjuku-kuTokyo, 162JapanPhone: 81-3-3267-7891FAX: 81-3-3267-8510

KOREALinear Technology Korea Co., LtdYundang Building #1002Samsung-Dong 144-23Kangnam-Ku, Seoul 135-090KoreaPhone: 82-2-792-1617FAX: 82-2-792-1619

SINGAPORELinear Technology Pte. Ltd.507 Yishun Industrial Park ASingapore 768734Phone: 65-753-2692FAX: 65-752-0108

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UNITED KINGDOMLinear Technology (UK) Ltd.The Coliseum, Riverside WayCamberley, Surrey GU15 3YLUnited KingdomPhone: 44-1276-677676FAX: 44-1276-64851

World HeadquartersLinear Technology Corporation1630 McCarthy BoulevardMilpitas, CA 95035-7417Phone: (408) 432-1900FAX: (408) 434-0507

U.S. AreaSales OfficesNORTHEAST REGIONLinear Technology Corporation3220 Tillman Drive, Suite 120Bensalem, PA 19020Phone: (215) 638-9667FAX: (215) 638-9764

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CENTRAL REGIONLinear Technology Corporation2010 E. Algonquin Road, Suite 209Schaumburg, IL 60173Phone: (847) 925-0860FAX: (847) 925-0878

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LLINEAR TECHNOLINEAR TECHNOLOINEAR TECHNOLOOGGYGY · 2 Linear Technology Magazine • November 1999...

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Transcript of LLINEAR TECHNOLINEAR TECHNOLOINEAR TECHNOLOOGGYGY · 2 Linear Technology Magazine • November 1999...