A Digital-Analog Mixed Temperature Compensated Crystal Oscillator with 1.8V/0.18μm Mix-Signal CMOS Process

Shulong Li, Liyang Pan, Liye Wang and Dong Wu Institute of Microelectronics, Tsinghua University, Beijing, China

li.shulong11@gmail.com, panly@tsinghua.edu.cn

Abstract- In this paper, a digital-analog mixed frequency-temperature compensation method is proposed for high precision temperature compensated crystal oscillators (TCXO). The analog compensation network adopts a temperature sensor and a function generator to generate the cubic and linear analog compensation voltages. The digital compensation network, which contains an 8-bit SAR-ADC, an 8-bit DAC and a 2 Kb CMOS process based non-volatile RAM, is designed to offset the analog compensation deviation and improve the compensation precision with smaller memory capacity. The simulation results show that the proposed approach can achieve 0.2 ppm frequency stability over a wide temperature range from -40oC to 85oC, and the system power consumption is not higher than 1.95mA@1.8V.

Keywords- TCXO, DTCXO, Digital-Analog Mixed Compensation, NVRAM, Single-Chip

I. INTRODUCTION As the rapid development of information electronics,

consumer electronics, communications and other applications, the demand of high precision temperature compensated crystal oscillator (TCXO) keeps increasing. Currently, there are mainly three temperature compensation methods: analog temperature compensation (ordinary TCXO), digital temperature compensation (DTCXO) and microcomputer compensated crystal oscillator (MCXO) [1-4].

In the early days, analog compensation method mainly adopted thermistor compensation network, while it’s not suitable for CMOS process integration. The subsequent opposite cubic curve based analog compensation is widely used for AT-CUT crystal oscillators, which features with good process integration and long-term temperature repeatability, but with poor frequency-temperature (f-T) stability and narrow temperature range [1]. The existing DTCXO has better digital compensation precision, but needs large capacity of non-volatile EEPROM (Electrically Erasable Programmable Read-Only Memory) [2]; the needed special EEPROM process results in high process cost and power consumption compared with analog compensation TCXO. Microcomputer compensated crystal oscillator has the best f-T stability, but also shows disadvantages in: complicated structure and high cost, higher power consumption, and poor short term stability because of the quantized error due to the digital processing.

Ordinary TCXO is simpler in the structure, lower in cost and power consumption. Especially, its better repeatability and non-quantization-error [3] make it possible to hybrid with following digital compensation, i.e. digital-analog mixed

double compensation, to achieve higher precision. However, the necessary special EERPOM process for digital compensation affects the compensation precise and increases the process cost. So the current double compensation methods are mainly based on discrete devices to realize.

Based on a previous developed pure-logic non-volatile random-access-memory (NVRAM) [5], this paper proposes a digital-analog mixed compensation method for single-chip high precise TCXO with standard 0.18μm mix-signal CMOS process, which can combine the advantages of analog and digital compensation approaches and reduce the needed memory capacity and process cost.

II. SYSTEM STRUCTURE Quartz crystal resonators have different cutting types [6],

each one features with different f-T characteristic. Among them, the f-T characteristic of the AT-CUT crystal resonator can be described by cubic function [7]:

0013

03 A)TT(A)TT(A)T(f +−+−= (1)

where A3 and A1 are the coefficient of temperature cubic items and linear items of a crystal resonator, respectively, and T0 is the temperature of the turning points in the curve.

The analog compensation circuit generates an opposite cubic curve to compensate the f-T variation. However, the frequency changes significantly with different cut angle and in a wide temperature range, the precise of this method is limited in the order of several ppm. Owning to the better repeatability and non-quantization-error of the analog compensation, its deviation can be offset with the digital compensation.

The system structure of the digital-analog mixed temperature compensated crystal oscillator is shown in Fig. 1. It mainly includes: 1) Temperature Sensor, sensing the environment temperature and transform it into a linear voltage signal; 2) Cubic and Linear Function Voltage Generator, which transforms the output of temperature sensor to the cubic and linear analog compensation voltages; 3) ADC, which converts the output of temperature sensor into address for data memory; 4) Non-Volatile Random-Access-Memory (NVRAM), storing the digital compensation data; 5) DAC, converting the digital compensation data from NVRAM to secondary digital compensation voltage; 6) VCXO, adjusting the crystal frequency through the variable capacitors controlled by the said analog and digital compensation voltages; 7) System Control Logic and State-Machine circuit.

____________________________________978-1-4799-4808-6 /14/$31.00 ©2014 IEEE

Figure 1. System block of the digital-analog mixed temperature compensated

crystal oscillator.

The whole system can be divided into two parallel compensation networks: the analog compensation network and digital compensation network. The analog compensation network is composed of temperature sensor, cubic and linear function generator and VCXO, while the digital compensation network is composed of temperature sensor, ADC, NVRAM, DAC and VCXO. After analog compensation, the crystal oscillator f-T stability will be largely improved. So the system needs lower capacity of non-volatile memory than DTCX. Such a system structure can also lower the complexity of the analog and digital compensation network.

III. ANALOG COMPENSATION SCHEME The circuit of temperature sensor and the cubic function

voltage generator is shown in fig. 2 (a) and (b). The temperature sensor consists of three parts: A) temperature sensing unit, in which two groups of PNP transistors sense the outside temperature and transform it into linear voltage changes; B) the amplifier is used to enlarge the voltage difference between V1 and V2 to reduce the output error of Vref; C) the cascode current mirror is used to provide bias currents for PNP transistors to ensure that the currents of the two symmetric branches are the same.

The circuit structure of the cubic function voltage generator [8] consists of four differential pairs: MA1-MA2, MB1-MB2, MC1-MC2 and MD1-MD2, which compare the Vin to three different reference voltages VL, VM and VH respectively, where Vin is the voltage output of the temperature sensor and the three reference voltages follow with VL<VM<VH. The second differential pair MB1-MB2 is mutual coupling with the fourth one MD1-MD2 to offset the linear item. RA1-RA2, RB1-RB2, RC1-RC2, RD1-RD2 are four pairs of adjustment resistors with different resistance. According to [8], if the reference voltages and the adjustment resistors are designed desirably, the output voltage is:

'M VVV

V)VVin(bV

0

03

33

−=

+−=

ΔΔ

(2)

(a)

(b)

Figure 2. Schematic of the (a) temperature sensor and (b) cubic function voltage generator.

where V0’ is the offset of the input voltage, V0 is constant, b3 is determined by the gain of the differential pair.

The simulation results of the temperature sensor and cubic function generator is shown in fig. 3 (a) and (b) respectively. As shown in fig. 3 (a), the output voltage of temperature sensor has a good linearity in the temperature range of -40oC~85oC. Fig. 3 (b) shows the output current curves of the four differential pairs in the cubic function generator. It’s obvious that the output currents of the mutual coupling differential pairs (MB1-MB2 and MD1-MD2) show good symmetry and can offset the linear items of the branch current effectively, therefore the output voltage of the generator may only have cubic and constant items.

Fig. 3 (c) presents the simulated results of the cubic analog compensation voltage, which is combined with the cubic function voltage generator and the temperature sensor. The results are also compared with an ideal cubic function curve fitted through Matlab, marked with circular dots. The slight fitting deviation shows that the designed cubic function generator realizes a good cubic function. It needs to note that the cubic function voltage generator is rather sensitive to the variation of the supply voltage VDD. Through stabilizing the output voltages of the current sources, the variation of V3 is smaller than 2mV with VDD fluctuating ±5%.

The linear analog compensation voltage can be obtained by amplifying the temperature sensor output. The cubic f-T characteristic of AT-CUT quartz crystal resonator has good uniformity, while the linear coefficient shows large variation to

(a)

(b)

(c)

Figure 3. Simulated results of the (a) temperature sensor, (b) cubic function generator, and (c) cubic analog compensation voltages.

different cut angles. So the amplify factor of the linear voltage amplifier is configurable to compensate the variation of different crystals, and the needed configuration parameters are stored in the embedded NVRAM described in the next section.

IV. DIGITAL COMPENSATION SCHEME The signal of the temperature sensor is also output for the

digital compensation, wherein ADC converts the temperature sensing voltage to the address of NVRAM, and DAC converts the memory data to digital compensation voltage. The CMOS process based NVRAM is used to store the digital compensation data and the configuration parameters of the analog compensation circuits. As shown in fig. 1, the analog and digital compensation networks are parallel and independently control the variable capacitors in the VCXO, therefore can improve the stability and precision of the system.

Because the ambient temperature changes slowly, an 8-bit successive approximation ADC (SAR-ADC, [9]), which

features with simple structure, low power consumption, good stability, but low sampling rate, is adopted in the design. With the temperature range of -40oC~85oC, the 8-bit ADC can give 256 sampling points with 0.5oC interval.

Assuming the highest f-T variation after analog compensation is 10 ppm and the target precision is 0.1ppm, it’s easy to calculate that DAC requires 8 bits. Considering the low speed and low power consumption requirement, the DAC adopts the inverted T-resistor structure [10]. Accordingly, the needed memory capacity is 256×8 bits.

NVRAM is another core module in the digital compensation network. Our previous work in [5] had developed a pure CMOS process based NVRAM technology, which eliminates the floating-gate EEPROM devices and high voltage CMOS transistors in the traditional EEPROM process. Fig. 4 shows the structure of the proposed memory cell, which uses the single-poly PMOSFET transistors to construct the coupling capacitor Cc, the write-in tunneling capacitor CT and the access transistor Mread. The detailed operation mechanism can be found in [5]. Based on this NVRAM, the whole TCXO system can be single-chip integrated with standard CMOS process to reduce the process cost.

Figure 4. Pure CMOS process based NVRAM cell [5]

Through the external test system, one can measure the dispersion between the analog compensation deviation and the target precision and calculate the digital compensation data with a compensation algorithm integrated in the auto-testing equipment. Fig. 5 shows the simulated digital compensation results, which also features with a good cubic function.

Figure 5. Simulated results of the digital compensation voltages.

V. THE EXPERIMENTAL RESULTS The whole system is designed with SMIC’s 0.18�m mixed-

signal CMOS process. The details of the simulation parameters are shown in table I. The power supply voltage is 1.8V, and the temperature range is -40oC ~85oC. Fig. 6 shows the simulation results with the point-by-point sampling and compensation method, wherein the sampling interval is 0.5oC. The simulation results show that the analog compensation result can achieve 5ppm and the designed digital-analog mixed TCXO can achieve 0.2 ppm frequency stability over a wide temperature range from -40oC to 85oC (with right ordinate), and the system power consumption is not higher than 1.95mA@1.8V.

The point-by-point sampling and compensation method can achieve the highest ideal compensation precision, but needs long testing time. The real measure procedures usually uses the interpolation compensation method to reduce the sampling temperature points and the corresponding testing cost. Fig. 7 shows the 5-point sampling compensation results with the interpolation compensation method, in which only five temperature points: -40oC, -10oC, 20oC, 55oC and 85oC, are choosed for testing and fitting the digital compensation data. The results show that the interpolation compensation method enlarges the f-T stability to about 1 ppm in the temperature range of -40oC~85oC (with right ordinate). While in a relatively narrow temperature range of -40oC~65oC, the f-T stability still can be controlled below 0.5 ppm to satisfy most of the applications.

TABLE I. Main Simulation Parameters

Process 0.18�m mixed-signal CMOS process

Power supply voltage (typical) 1.8 Volts

Temperature range -40oC ~85oC

Temperature-frequency stability1 0.2 ppm

Temperature-frequency stability2 1 ppm

Power consumption 1.95 mA@1.8 Volts

Voltage-frequency stability �0.1 ppm/1.8±5% Volts

Load capacitor 10 pF

Chip Size 0.68 mm2

Figure 6. System simulation results with the point-by-point compensation

Figure 7. System simulation results with 5-point interpolation compensation

VI. CONCLUSION Base on a CMOS process NVRAM, a digital-analog mixed

temperature compensation method is proposed for single-chip high precise TCXO. The analog and digital compensation networks are designed and combined in parallel to improve the frequency-temperature stability and reduce the needed memory capacity. The point-by-point compensation and the interpolation compensation methods are also presented to achieve 0.2 ppm and 1 ppm TCXOs for high precision and low cost applications respectively.

VII. ACKNOWLEDGMENT The work is supported by National Key Scientific and

Technological Project (No. 2013ZX01032001-001-003).

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