A Micro-Power High-Resolution ΣΔ CMOS Temperature Sensor

Souha Hacine, Tarik El Khach, Frederick Mailly, Laurent Latorre, Pascal Nouet University Montpellier 2 / CNRS

LIRMM, Microelectronic Dpt. Montpellier, France

latorre@lirmm.fr

Abstract— This paper introduces a simple and compact CMOS temperature sensor which sensing principle relies on the measurement of integrated polysilicon resistances. The architecture makes use of two resistive layers of opposite temperature coefficients, both being available in the CMOS process. In order to tackle power consumption issues, usually related to resistive transduction and Wheatstone bridge conditioners, resistors are here placed in an original stage featuring gain even at very low-biasing current (2µA in this case). This analog front-end is used into a 1st order ΣΔ modulator, providing a digital output (i.e. a bitstream) with little additional silicon surface. The paper describes the design of the circuit and provides both simulation and experimental results. Experimental data are obtained from silicon prototypes, over a -40°C to 100°C temperature range. High resolution (below 0.1°C) is observed.

I. INTRODUCTION Interest for cheap low-power integrated sensors is

constantly growing with the development of low-cost portable consumer products and Wireless Sensor Networks (WSN). The context of this work is the low-cost integration of multi-sensor systems. The use of standard CMOS technology together with cheap wet-etching post-process enables the batch fabrication of monolithic multi-sensor circuits that include accelerometers, magnetometers, microphones, and pressure sensors [1]. In order to widen the application fields of such systems, the temperature sensing is investigated here.

Abundance of research papers in the field of temperature sensors makes a global evaluation rather difficult. Digital structures, based on delay-to-temperature dependence achieve very good power efficiency, small silicon area but are limited in terms of resolution [2]. Sensors based on temperature dependence of the PN junction voltage are also quite popular and exhibit very good performances [3], [4].

Resistive sensing is commonly valued for its low integration cost and ease of implementation but suffer from poor performance regarding the power consumption and the signal-to-noise ratio. In this context, we have proposed an innovative circuit for the conditioning of resistive sensors that

addresses the above mentioned issues [5]. This so-called “Active Bridge” structure aims at providing amplification and limited noise contribution while using the same current to bias both sensing elements and amplification circuitry.

In this paper, the proposed sensor is based on temperature coefficient of polysilicon resistors and relies on the use of an Active Bridge. It can therefore be considered as an improvement of the conventional Wheatstone bridge. In previous work, we have shown that the Active Bridge can be compensated for offset using a digitally controlled feedback [6]. In this paper, we extend this concept by using a 1bit feedback loop that delivers a direct digital output taking advantage of the Active Bridge high output impedance.

II. OPEN-LOOP SENSING CIRCUIT The proposed temperature sensor (Fig.1.) uses four

polysilicon serpentines with two different doping and therefore, Temperature Coefficient of Resistance (TCR) with opposite signs. These TCR have been chosen in relation with available materials in the targeted CMOS technology and design constraints: the possible materials to implement sensitive resistors with TCR (around 10-3/K) of opposite signs are polyh and poly2 in the AMS (Austria Microsystems) 0.35µm CMOS technology.

The nominal resistor’s value is set to 620kΩ in order to achieve low-power biasing conditions with the Active Bridge under Vdd=3.3V.

The temperature variation results in a change of each sensitive resistor value given by: ∆ · · ∆ (1)

A small increase of the voltage drop across a sensing element Ri leads to a reduction in the gate-source voltage (Vgs) of the transistor Ti. This Vgs increase induces a more important drain-source voltage increase to keep the drain source current constant. Therefore, a small variation of the voltage drop

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(ΔR×I0) results in a large variation of the output voltage. Considering only one sensing resistance, we obtain: ∆ 2 ∆ (2)

where G is the circuit gain, and I0 is the biasing current set to 1µA (Idd/2).

Figure 1. Temperature sensor based on resistors TCR

and the Active Bridge

Note that all transistors have been designed to achieve the same transconductance coefficient (gm) and the same effective voltage Veff=Vgs-Vt. Now taking into account all four sensing resistors, the small-signal output voltage becomes: 4 ∆ (3)

where ΔReff is the effective resistance variation of sensing elements. It is based on an effective TCReff which is calculated using the two temperature coefficients of the materials polyh and poly2:

2 0.67 10 /

Using TCReff in Eq. 1 leads to an effective resistance variation Δ 620 Ω 415.4Ω/° . In order to validate the model, the transconductance gm and output resistance rds of the transistors are taken from the simulated bias point (gm=4.25µA/V, rds2=1.76GΩ, rds4=666MΩ). The sensitivity, then calculated using Eq. 3, is S≈3.4V/°C. This result is confirmed by the simulated transfer characteristic shown in Fig.2. The sensitivity calculated from the slope around T=27.2°C is 3.43V/°C.

Current consumption has been also verified (Fig. 3.). The simulated supply current is closed to the targeted current (2µA) and quite independent of the temperature. This result is confirmed experimentally, although a slightly higher current is observed on the measured sample.

Same resistors arranged in a Wheatstone bridge would led to a sensitivity of only 2.2mV/°C with a bias current of 5 µA. This comparison establishes the Active Bridge as a very efficient alternative to the Wheatstone bridge.

Due to this impressive sensitivity, open loop operation is not directly applicable to temperature sensing. Indeed, mismatches between normally identical components of the bridge would lead the output to saturation and the dynamic range (Fig. 3.) is limited to less than one degree. In the following, we present a digital feedback architecture to control the gain to the required full range of temperature and to provide a digital output as a bitstream.

Figure 2. DC transfer curve of the Active Bridge

as a function of the temperature

Figure 3. Supply Current of the Open-Loop sensor (measured and

simulated) as a function of temperature

III. CLOSED-LOOP ARCHITECTURE A. Feedback Principle

Various feedback principles have been investigated, using either linear electronics or discrete time architectures. In this study, we investigate the implementation of a ΣΔ feedback to control the operating point. This modulator principle is chosen for its noise shaping properties leading to high resolution and its efficiency to convert analog signal into the digital domain with very few additional elements.

The modulator architecture based on the Active Bridge is depicted in Fig. 4. Temperature variation induces a change in sensing resistances that are further converted to a voltage signal thanks to the Active Bridge. This signal is integrated

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through an integrator stage simply implemcapacitor. Taking benefit of the large output Active Bridge (≈ 2GΩ), the integrator behavifrequencies above 4 Hz. The integratedcompared to a reference voltage (taken from the Active Bridge) and comparator output latch. Clock frequency has been set to 16obtain a 12 bits resolution on a 2 Hz signimplementations, differential comparator cathat case, bridge output is then compared voltage of the D-latch input.

The delivered bitstream controls a pairconnect the supply voltage Vdd to either terminal of the feedback resistance Rfb. Thisthe bridge by adding the feedback resistancethe other. Feedback resistance is then calculaoffset and targeted dynamic range. Here, offto mismatches between resistors of differenton a Monte-Carlo analysis and on the targete(-40°C to 100°C), the feedback resistance Rfto 35% of the nominal resistance Ri.

Figure 4. Schematic of the sensor achitecture based ocell placed into a 1st order ΣΔ modula

B. Characterisation Setup The fabricated circuit (Fig. 5) includes tw

Bridges (one being connected to stanamplifier used as a comparator). The integrCint has been left external to save area andparametric studies.

The characterization setup is fully aucomputer running Matlab® that controls a thsmall temperature steps, and an oscilloscopsignal capture. For each temperature step,recorded (@ 16 kHz modulator frequency)window and 160,000 samples (i.e. logical staavailable to compute the average number of

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) over a 10s time ates) are therefore f ‘1’ in percent. In

that case, the quantification noise oresolution higher than 17 bits and acalibrated temperature sensor (basedPT100) is mounted on the sensor preference.

Figure 5. Photograph of the 0.35µm CMOSSilicon area of one sensor

IV.RESULTS & DISC

We have first studied the static 6.) as a function of the temperaturetemperature range. Simulated and exare reported together with the best Modulator sensitivity is always vervalue that can be calculated easily fro2. Δ 2 0.35

Offset is similar for both sensors25% of “1” in the bitstream. At tcomparator appears to be really optio

Figure 6. Simulated and experim characteristics over the full ran

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CUSSION sensor characteristic (Fig. e over the -40° to 100°C xperimental characteristics

linear fit (dashed lines). ry close to the theoretical om:

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From previous results, we have extracted the nonlinearity error over the same temperature range (Fig. 7.). Simulated and both experimental non-linearities are quite similar. The maximum error is reached at extreme temperatures and is equal to 6.5%. A 3-points calibration procedure (interpolation of the sensor characteristic by a 2nd order polynomial function) would lead to a sensor accuracy of 1% over the full range.

After investigation, it appears that the non-linearity comes from a quadratic term in polysilicon TCR. A simulation (not shown here) with an ideal model of sensing resistors (i.e. linear) reveals a linear behavior of the Active Bridge conditioning circuit.

Figure 7. Non-Linearity Error as a function of temperature for the three

static characteristics of figure 6 plus calculated error after a 3 points calibration procedure.

Figure 8. Spectrum of the sensor bitstream, used to estimate the sensor resolution.

To estimate resolution, the sensor response is simulated with a sinusoidal temperature input at a frequency of 10 Hz. the bitstream is recorded within a 1s time window

corresponding to 16,000 cycles at 16 kHz modulator clock. These transient data are further processed by Fourrier analysis. The so-obtained spectrum (Fig. 8.) exhibits expected noise shaping for a 1st order ΣΔ modulator. From the noise floor at low frequency we can estimate a resolution of about 1mK (17bits over the full temperature range) for a 1Hz bandwidth.

The measured supply current of the modulator is at this moment quite important (60µA) while the biasing current of the Active-Bridge stage is only 2.5µA. Most of this current consumption comes from the latch cell which is currently a simple digital flip-flop from the standard cell library working with an input signal always close to its internal threshold voltage.

V. CONCLUSION This paper presents a low-power temperature sensor based

on the Temperature Coefficient of Resistance (TCR). Resistance variations are then converted to a voltage thanks to an original self-amplified bridge. The whole is inserted in the loop of a ΣΔ modulator to obtain a direct digital output with a very compact and high-resolution architecture. Experimental results demonstrated a high sensitivity of 0.4%/°C and a resolution of 17bits.

On-going work concerns (i) the design of a custom low-power comparator stage, using positive feedback to avoid continuous short-circuit current in the latch and (ii) the on-chip integration of the capacitance Cint by using the Miller effect across a gain stage to reduce the capacitance value. With these improvements, next sensor generation will bring a fully integrated solution with a targeted power consumption of 10µW.

ACKNOWLEDGMENT This work was supported by ANR, the French National

Research Agency, under the project MIDISPPI.

REFERENCES

[1] Alandry B., Latorre L., Mailly F., Nouet P., “A CMOS-MEMS Inertial Measurement Unit”, IEEE SENSORS, Waikoloa, HI, USA, Nov. 1-4, 2010, pp. 1033-1036.

[2] K. Woo, S.Meninger, T. Xanthopoulos, E. Crain, D. Ha , D. Ham, “Dual-DLL-based CMOS all-digital temperature sensor for microprocessor thermal monitoring” IEEE International Solid-State Circuits Conference, (ISSCC’09), San Francisco, 8-12 Feb, 2009, pp.68.

[3] M. Pertijs, K. Makinwa, J. Huijsing, “A CMOS temperature sensor with a 3σ inaccuracy of ±0.1°C from −55°C to 125°C,” J. Solid-State Circuits, vol. 40, issue 12, pp. 2805 – 2815, Dec. 2005.

[4] K. Souri, K. Makinwa, “A 0.12mm2 7.4μW micropower temperature sensor with an inaccuracy of ±0.2°C (3σ) from −30°C to 125°C”, IEEE ESSCIRC’10, Seville, Spain, 14-16 Sept, 2010, pp. 282–285.

[5] Boujamaa E.M., Nouet P., Mailly F., Latorre L., “Circuit for Amplifying a Signal Representing a Variation in Resistance of a Variable Resistance and Corresponding Capacitor”, Intl. Patent WO/2010/001077, Januray 7, 2010.

[6] Boujamaa E. M., Alandry B., Hacine S., Latorre L., Mailly F., Nouet P., “A Low Power Interface Circuit for Resistive Sensors with Digital Offset Compensation”, IEEE ISCAS, May 30th –June 2nd , Paris, France, 2010, pp. 3092-3095.

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