X-A Modulator-Based Linear Phase IIR Filters

Qiuting HUANG and Paul T. MAGUIRE

Integrated Systems Laboratory, Swiss Federal Institute of Technology CH-8092 Zurich, Switzerland Tel. 4 1 1 632 5240, Fax. +41 1 252 0994, Email. huang@iis.ee.ethz.ch

Abstract - The application of sigma-delta modulation to oversampled, block-processed linear phase IIR filters is suggested a a means of achieving considerable savings in hardware. Architectures are described which eliminate the impulsive noise arising from the block reversal of oversampled data.

Introduction In applications where linear phase filtering is desirable. finite impulse response (FIR) filters are most frequently used. However. for steep magnitude response requirements, the many multiplies required by long FIR filters make them expensive to implement in terms of silicon area. Infinite impulse response (IIR) filters, on the other hand. require fewer multiplies for a given magnitude response but do not exhibit linear-p hase characteristics. By applying block-processed t ime reversal coupled to overlap-save or overlap-add [ 1) techniques it is possible to implement real-time IIR linear-phase filtering by truncating the impulse response to a finite length. A recent example is shown in Figure la, where the structure employs the overlap- save principle to implement a block-processed linear-phase IIR filter [ 2 ] . In overview, the infinite impulse response of the IIR filters in this system can be assumed to be truncated to L + l samples by the reset signals RA and RB. The L-sample last-in- fist-out processor (LIFO) and 2L delay accomplish piecewise reversal of the input data in sections of 2L samples with an overlapping of L samples between blocks on the two parallel filtering channels. The f i s t L samples of a data block emerging from a channel filter cannot be used due to time aliasing [l]. After L samples, however, the initial transient has cleared and the output is selected by S W 2 (all switches are ganged and toggle at L sample intervals). The filtered block reversed data is subsequently subjected to L sample LIFOing, restoring the correct temporal relation between samples. Subsequent causal filtering by another identical IIR filter cancels the phase distortion introduced by the acausal filter giving an overall linear-phase transfer function with the magnitude response lH2(z)l. To minimize the distortion due to truncation of the filter's impulse response, which depends on both the pole locations of the filter and the ratio between the sampling frequency and the filter's cutoff frequency, the block length L must be sufficiently long. In [2], Nyquist sampling is assumed and the resulting block length L is relatively short. If the system is to be used in a real-time environment, the antialiasing filter that usually precedes an A D converter to acquire the digital data will inevitably introduce phase distortion within the passband of the linear phase system. Considerable oversampling (O/S) is needed to ensure that this phase distortion is of an acceptably small magnitude. The exact degree of phase distortion acceptable is of course dependent on the application. If a third-order Butterworth filter 1s employed for antialiasing, 32xO/S will typically be needed to ensure that passband group delay variation is less

than one sample whilst retaining 40dB rejection of aliased products. In such applications therefore, the block length L will be significantly higher than that in filters sampled at Nyquist rate. Since each LIFO structure in Fig.la consists of a bidirectional shift register containing as many word-sized elements as the block length implemented [ 2 ] , the system needs 4.L.W bits of memory where W is the PCM wordsize. Oversampling required by the phase linearity of antialiasing filters thus translates to high memory requirement which is expensive. As an example, consider the case of a linear phase IIR filter system with H(z) specified as a sixth-order filter comprising of a thud-order Chebyshev type I with 0.5dB pass-band npple and cut-off at fc=lOkHz, in cascade with a third-order Butterworth with cut-off at 2fc. A twelfth-order linear phase filter would thus be realised with 1dB of passband ripple. Cascading the Chebyshev and Butterworth filters in this way has the considerable advantage of achieving very high attenuation for input frequencies above 2fc without incurring an excessively large block length requirement. Even so, simulations results in Table 1 show that to achieve around SOdB (82.3dB) signal to noise plus distortion (S/(N+D)) ratio with 32x O/S and harmonic distortion components below the noise floor. a 13 bit wordlength is required with a block length, L. of 320 samples. The total memory requirement is thus 16640 bits.

SDM-Based Filter Structures As the system discussed above is heavily oversampled, one way to reduce the hardware requirement is to replace the front end A D converter by an oversampled A/D converter based on sigma-delta modulation [3]. A general block diagram of a sigma-delta modulator is shown in Fig.2a. Fig.2b shows the modulator's 4th-order implementation. The modulator converts an analog input into a high speed stream of ones and zeros. Due to the modulator's noise shaping property. quantization noise introduced by the quantizer Q in Fig.2a has a highpass characteristic. The information of the analog input. on the other hand, is contained at the low frequency portion of the binary output's spectrum. To retrieve the baseband information, lowpass filtering is used to remove the quantization noise and reconstruct an accurate, multibit digital representation of the desired output signal. This lowpass filtering is naturally provided by the filter we wish to implement, so that no additional clrcuit is needed. Similar approaches have been suggested in [4] and [5] to implement analog FIR filters and causal IIR filters, respectively. Using a sigma-delta modulator in a blocked processed IIR filter has two apparent advantages: one is that it reduces the

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word length W of the first LIFO filter from more than 12bit.s to one bit. which substantially reduces the memory cost; the other is that most of the multiplies in the filter can be implemented by simple additions, as one of the multiplicands is a one bit signal. Two factors, however, limit the practical memory saving achieved by replacing the multibit AID converter with a sigma-delta modulator (SDM). One is the oversampling ratio required by a sigma-delta modulator. To achieve good S N R figures with sigma-delta modulator-based linear-phase IIR filters, the O/S ratio and hence L need to be increased even further compared to those mentioned above for a multibit implementation. To limit the increase of oversampling ratio. high order modulators, which have steeper noise shaping characteristics, should be used. The second problem is the memory requirement of the last LIFO in Fig.la. Since the filters' out-puts are multibit again. the last LIFO must also be multibit. If the length of the LIFO increases a few times as a result of the increased oversampling rate required by the modulator, any saving in the registers before the filters will be offset by the increase in LIFO memory after the filters. This is shown in Table 1 which compares the simulated performance of the system for the twelfth-order example already described. Throughout this paper. undithered fourth- order single-stage modulators of the type shown in Figure 2b and elliptical noise shaping [4] have been employed to illustrate the performance of the system with a typical high- order single-bit modulator. H(z) is as described in the previous section with l lOx O/S. As Table 1 shows, noise performance is comparable to the 32xO/S 13-bit system, but savings in memory are unfortunately negligible, due to the need to retain a final multibit LIFO coupled to an increase in oversampling - the system still requiring 16480 bits of memory.

A Block-Processed Linear Phase IIR Filter without Multibit LIFOs It is tempting to insert another EA modulator before the final LIFO, as shown dotted in Fig.lb, to reduce its wordsize and thereby realise further memory reductions. Unfortunately. such an approach results in the noisy (31 dB SNR) output spectrum in Figure 3a (input 3k& at -5dB). The pcor performance of this structure is due to the special problems of LIFOing an oversampled bitstream. For the case of the system without 2A2, the output from SW2 is effectively time reversed in blocks of L samples. LIFOing this data with a block length of L samples delivers the acausal filtered signal because signal level information is available instantaneously. When XA2 is inserted, however, the causal filter needs many samples to build up a representation of the signal level due to much lower resolution of each individual sample in the final LIFO. Reconstruction can only be achieved if the dependency between a sample and its neighbours is retained. LIFO-ing the bitstream destroys the temporal relation between bitstream samples at the beginning of a new block. At these points the causal filter receives samples unrelated to earlier samples (which were derived from a different LIFO block). The result is the output of signal-related impulses as seen in Figure 3b. which shows the nature of the output noise in the time domain. To overcome the above problem, we propose the structure shown m Fig.lc, which eliminates all multibit LIFOs and yet retains good noise performance. This structure extends block processing to part of the causal filtering. The remainder. H ~ ( z ) , is realised conventionally. I.e. H(z) = H ~ ( z ) . H ~ ( z ) . Extending block-processing to causal filtering improves the noise performance of the system because the majority of the impulsive noise introduced by LIFOing the bitstream is

discarded in the overlap in a similar manner to the time aliasing of the acausal filter. In the block processed causal filter section. the impulse response of H1(z) is truncated to approximately L1+1 samples. The initial L1 samples are discarded since they are subject to time aliasing. These samples also conveniently contain the bulk of the filtered impulsive noise resulting from LIFOing the bitstream. After L1+1 samples, when the output is selected by SW2 (which now toggles every L+L1 samples), H ~ ( z ) has received sufficient related samples to approximate the signal accurately. ibloreover, since multibit signals are being switched, discontinuities are minimised. The overall input block size required by this system is 2 ( L + L 1 ) samples. The acausal filters discard the first L samples which means that the L+2L1 LIFOs (in each channel) must wait for L samples before acquiring new data (hence the delayed timing signal). The block processed causal filter discards a further L1 samples, leaving L+L1 usable output samples. This system requires 5L+7L1 words of storage which is greater than the requirements of the multibit system. However, considerable savings in memory are still possible because the wordsize required by the ZA bitstreams are so much smaller than in the multibit system. To minimise memory requiremenrs. L1 should be as small as possible. L1 is dependent on the number of poles of H(z) realised in H1(z). For minimum L1. should be of minimum order. However, choice of H ~ ( z ) must be a compromise since, if H ~ ( z ) is of insufficient order, suppression of the impulsive interference will be inadequate and noise performance deteriorates. X good compromise for the sixth-order filter example is to realise the third-order Butterworth filter as H1(z) while H ~ ( z ) implements the third-order Chebyshev filter. This configuration gives the impulse responses indicated in Figure 43 and 4b for l lOx O/S with L=1030 samples and L1=329 samples. Figure 4d, 4e and 4f show spectral densities of signals at various stages of the system for the input shown in Figure 4c. Figure 4d shows the spectral density after the f i s t modulator. t he 4th-order ell iptical noise shaping characteristic being seen superimposed on the input signal. Figure 4e shows the spectral density after acausal processing by H(z), the second stage of sigma-delta modulation and partial causal filtering by H1(z). Finally, Figure 4f shows the spectral density after the final stage of causal filtering with excellent rejection of both quantisation noise and inputs above fc. Here, the S/(N+D) performance is 81.95dB which compares well with the 13-bit system detailed earlier. Moreover. the storage requirement is 7453 bits - around 44% of the memory requlred by the 13-bit system. .As mentioned earlier, it should be noted that saving in hardware is not confined to a reduction in memory required. Firstly, a sigma-delta modulator front-end requires much less silicon than 3 conventional multibit A/1) converter. Secondly. the IIR filter implementations themselves are considerably simplified since the input multiplies required now become simple subtractions of a fixed constant. Currently, the feedback multiplies must be handled as conventional multibit multiplies. However, we are currently investigating the possibility of adopting EA modulation within the feedback loop of the IIR filter - thereby eliminating all multibit multiplies. Initial results of this work are promising.

Conclusions Application of sigma-delta techniques to block-processed

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linear-phase IIR filter structures can achieve significant savings in hardware. However, there are two problems which limit the benefits: Firstly, block reversal of bitstream data results in periodic impulse noise at the output. Such noise can be reduced by extending block processing to part of the causal filtering. The second problem concerns the increased O/S ratio needed to achieve good S/(N+D) ratio with sigma-delta techniques. This difficulty can be alleviated through the use of higher-order single stage modulators, which have been improving rapidly owing to the intense efforts of the integrated circuit community.

References [ 11 Oppenheim, A.V. and Schafer, R.W. , “Discrete-Time Signal Processing”, Prentice-Hall, New Jersey 1989. [2] Powell, S.R. and Chau, P.M., “A Technique for Realizing Linear Phase IIR Filters”, IEEE Trans. on Signal Proc., Vol.

39, No. 11. Nov. 1991, pp. 2425-2435. [3] Candy, J.C. and Temes. G.C., “Oversampling Methods for A D and DIA Conversion”, in “Oversanipling Delta-Sigma Data Converters, Theory, Design and Simulation”, IEEE Press, New York, 1992. [4] Chao, K.C.H, Nadeem, S., Lee. W.L. and Sodini, C.G.. “A Higher Order Topology for Interpolative Modulators for Oversampling A D Converters”, IEEE Trans. on Circuits and Systems, Vol. 37, No. 3., March 1990, pp.309-318. [5] Huang, Q. and Moschytz, G.S.. “Analog FIR filters with an oversampled 1-4 modulator”, IEEE Trans. on Circuits and Systs., Vol. 39, No. 9, Sept. 1992, pp.658-663. [h] Johns, D.A., and Lewis, D.M. and Cherepacha, D, “Highly Selective ‘Analog’ Filters Using AX Based IIR Filtering”, IEEE Proc. ISCAS ‘93, vol. 2 , p p . 1302-1305, iVuy 1993, Chicago, USA.

Table 1

Structure Input A D C ( s ) 01s L L1 Memory S / ( N + D ) Level /dB Ratio /bits /d B

Multibit 0 l x 1 3 b i t 3 2 ~ 3 2 0 - 4 x 3 2 0 ~ 1 3 82.32 (Figure la) = 16640

Intuitive -7 1 ~ 4 t h - o r d e r 1 l o x 1 0 3 0 - 3x1030 85 .38 ZA- based single-stage + l x 13x 1030 (Figure lb) ZA mod. + 13-bit LIFO = 16480

Intuitive CA- -7 2~4th-order 1 10x 1 0 3 0 - 4x1030 30.99 based (Fig. l b ) single-stage CA mods. = 4120

Hybrid with -7 3 ~ 4 t h - o r d e r 1 1Ox 1030 329 5x1030 81.95 partial block processed single-stage +7x329 causal filtering (Figure IC) XA mods. = 7453

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