HW5 Solution Spring 13 -

HW5 Solutions Sp13

Instructor: Dr.Parker4/5/2013

Solution No.1There are many different possible solutions. Here are two of them.

a) b)

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Euler Path: CBADDEGEF Euler Path: CBADEEGEF

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Solution No.2 (schematic (a))Stick diagram for schematic (a)

vdd

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C B A D D E G E F

gnd

Solution No.3 (schematic (a))For schematic a)

nnp

np

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nppp

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WWW

WW

LLWL

WL

23.3514.219

43

43

34

=

=

=

==

ββ

ββ

If Wn=4 λ, thenWp=12.9 λ ≈ 13 λ

In the pmos side, transistors with inputs A, B, C, D and E (connected to the output node) have the same size of Wp= 13 λ. Transistors E (connected to the vdd node), F, and G have sizes of (2/3)(13 λ).

In the nmos side, if the critical path (most resistive path) is unit size, then alltransistors have the same size. Otherwise, whenever possible WGn=1/2WEn; while the othertransistors are equal in size to the transistors in the critical path. This helps to maintainbalance between the different resistive paths from output to ground.

Solution No.4 (schematic (a))

capacitances that get charged that affect the output node

ON

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ON ON

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Note: The red circles identify only the capacitancesthat affect the output.

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We named the diffusion capacitance Cdp for a pmos transistor with W=13 λ

We named the diffusion capacitance Cdn for an nmos transistor with W=4λ

From the pmos side: there are 6Cdp+4(2/3)Cdp(the 2/3 term comes from the fact that there are 4 diffusions that belong to transistors that are 2/3 times smaller than W=13 λ ).

From the nmos side: there are 15Cdn (all transistors are unit size)

We could also express the total # of capacitances using only “Cdn”. In that case Cdp= 13/4 Cdn, and

Total # capacitances that affects the output =6(13/4)Cdn +4(2/3)(13/4)Cdn+15Cdn

Solution No.4 (schematic (a))

ON

ONONOFF

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Capacitances that get discharged thataffect the output node

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ON

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OFFOFF

OFFWe named the diffusion capacitance Cdp for a pmos transistor with W=13 λ






The next slides show the solution for questions 2-4 for schematic (b)

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Euler Path: CBADEEGEF

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Solution No.2 (schematic (b))Stick diagram for schematic (b)

vdd

out

C B A D E E G E F

gnd

Solution No.3 (schematic (b))For schematic b)

nnp

np

np

nppp

p

nn

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WWW

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LLWL

WL

69.3514.219

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5.33

35.3

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ββ

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Note: We have 3.5Rn because on the critical path there are two transistors in parallel that are ON, so their contribution to the equivalent resistance of the path is ½ of Rn

If Wn=4 λ, thenWp=14.75 λ ≈ 15 λ

In the pmos side, transistors with inputs A, B, C, D and E (except the one connected to the vddnode) have the same size of Wp= 15 λ. Transistors E (connected to the vdd node), F, and G have sizes of (2/3)(15 λ).

In the nmos side, if the critical path (most resistive path) is unit size, then all transistors have the same size. Otherwise, whenever possible WGn=1/2WEn; while the othertransistors are equal in size to the transistors in the critical path. This helps to maintain balancebetween the different resistive paths from output to ground.

Solution No.4 (schematic (b))

ON

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Capacitances that get charged thataffect the output node

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Solution No.4 (schematic (b))

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Capacitances that get discharged thataffect the output node

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Solution No.5

B E I

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WLT

WLCCox

roxgn

εε 0' ==

2' 1041

9.385.8 −×⋅

=oxC

( )( )( ) ( )2626 101.24101.2232 −− ×=×⋅⋅=WL

Solution No.6

a)

fFC gn 02.2=

b)

( ) fFfFC gn 347.102.232

=

=

Solution No.7( )( )( )

( )( ) ( )

( ) 1226

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262

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1226

1003.101.3

1029.2

101.23

10255.

2

10255.101.2/3103

−−

−−

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−−

×=×⋅=⋅=

×=×

+×=

⋅+⋅=

×=×−=⋅

π

π

WxA

A

rLWA

LW

jsw

floor

difffloor

diff

( )

( ) ( )( )( )( ) 66 10171.2101.232/3102

2_

1003.101.3

−− ×=×+−=

⋅+=

×=×⋅=⋅=

π

π rLswPerimeterWxA

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( ) ( ) 2_ µµjbsp

swfloorjbswp

DCAACswPerimeterC ⋅++⋅=

( )( ) ( )( ) pFCD4106.757.1103.29.8.117.2 −×=++=

Solution No.8

( )

++=

= 1

212

4201.4

WlRR s

HW5 Solution Spring 13 -

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