Datasheet - STB5NK50Z · PDF file N-channel 500 V, 1.22 Ω typ., 4.4 A SuperMESH™...

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Transcript of Datasheet - STB5NK50Z · PDF file N-channel 500 V, 1.22 Ω typ., 4.4 A SuperMESH™...

  • 1 2 3

    TO-220FP

    TAB

    TO-220 1

    2 3

    IPAK

    TAB

    1 2 3

    1 3

    TAB

    2

    DPAK I PAK

    TAB

    1 2 3

    2

    D(2, TAB)

    G(1)

    S(3) AM01475V1

    Features Order codes VDS RDS(on) max. ID Package

    STB5NK50Z-1

    500 V 1.5 Ω 4.4 A

    I2PAK

    STD5NK50ZT4 DPAK

    STP5NK50Z TO-220

    STP5NK50ZFP TO-220FP

    STU5NK50Z IPAK

    • 100% avalanche tested • Gate charge minimized • Very low intrinsic capacitance • Zener-protected

    Applications • Switching applications

    Description These high-voltage devices are Zener-protected N-channel Power MOSFETs developed using the SuperMESH™ technology by STMicroelectronics, an optimization of the well-established PowerMESH™. In addition to a significant reduction in on-resistance, these devices are designed to ensure a high level of dv/dt capability for the most demanding applications.

    Product status link

    STB5NK50Z-1

    STD5NK50ZT4

    STP5NK50Z

    STP5NK50ZFP

    STU5NK50Z

    N-channel 500 V, 1.22 Ω typ., 4.4 A SuperMESH™ Power MOSFETs in I2PAK, DPAK, TO‑220, TO‑220FP and IPAK packages

    STB5NK50Z-1, STD5NK50ZT4, STP5NK50Z STP5NK50ZFP, STU5NK50Z

    Datasheet

    DS2834 - Rev 6 - September 2018 For further information contact your local STMicroelectronics sales office.

    www.st.com

    http://www.st.com/en/product/stb5nk50z-1 http://www.st.com/en/product/std5nk50zt4 http://www.st.com/en/product/stp5nk50z http://www.st.com/en/product/stp5nk50zfp https://www.st.com/en/product/stu5nk50z http://www.st.com

  • 1 Electrical ratings

    Table 1. Absolute maximum ratings

    Symbol Parameter Value

    UnitI2PAK, DPAK, TO-220, IPAK TO-220FP

    VDS Drain-source voltage 500 V

    VGS Gate-source voltage ±30 V

    ID Drain current (continuous) at TC = 25 °C 4.4 4.4 (1) A

    ID Drain current (continuous) at TC = 100 °C 2.7 2.7 (1) A

    IDM (2) Drain current (pulsed) 17.6 17.6 (1) A

    PTOT Total dissipation at TC = 25 °C 70 25 W

    ESD Gate-source human body model(R = 1.5 kΩ, C = 100 pF) 3 kV

    VISO

    Insulation withstand voltage (RMS)

    from all three leads to external heat-sink (t = 1 s, TC = 25 °C)

    2.5 kV

    dv/dt (3) Peak diode recovery voltage slope 4.5 V/ns

    Tj Operating junction temperature range -55 to 150 °C

    Tstg Storage temperature range

    1. Limited by maximum junction temperature. 2. Pulse width limited by safe operating area. 3. ISD ≤ 4.4 A, di/dt ≤ 200 A/μs, VDD ≤ V(BR)DSS.

    Table 2. Thermal data

    Symbol Parameter Value

    UnitI2PAK, TO-220 TO-220FP DPAK IPAK

    Rthj-case Thermal resistance junction-case 1.78 5 1.78 °C/W

    Rthj-amb Thermal resistance junction-ambient 62.5 100 °C/W

    Rthj-pcb (1) Thermal resistance junction-pcb 50 °C/W

    1. When mounted on an 1-inch² FR-4, 2oz Cu board.

    Table 3. Avalanche characteristics

    Symbol Parameter Value Unit

    IAR Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max)

    4.4 A

    EAS Single pulse avalanche energy

    (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 130 mJ

    STB5NK50Z-1,STD5NK50ZT4,STP5NK50Z,STP5NK50ZFP,STU5NK50Z Electrical ratings

    DS2834 - Rev 6 page 2/29

  • 2 Electrical characteristics

    (TCASE = 25 °C unless otherwise specified)

    Table 4. On/off states

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 V 500 V

    IDSS Zero gate voltage drain current

    VGS = 0 V, VDS = 500 V 1 µA

    VGS = 0 V, VDS = 500 V, TC = 125 °C (1) 50 µA

    IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V ±10 µA

    VGS(th) Gate threshold voltage VDS = VGS, ID = 50 µA 3 3.75 4.5 V

    RDS(on) Static drain-source on resistance VGS = 10 V, ID = 2.2 A 1.22 1.5 Ω

    1. Defined by design, not subject to production test.

    Table 5. Dynamic

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    Ciss Input capacitance

    VDS = 25 V, f = 1 MHz, VGS = 0 V -

    535

    pFCoss Output capacitance 75

    Crss Reverse transfer capacitance 17

    Coss eq. (1) Equivalent output capacitance VDS = 0 to 400 V, VGS = 0 V - 45 pF

    Qg Total gate charge VDD = 400 V, ID = 4.4 A, VGS = 0 to 10 V (see Figure 16. Test circuit for gate charge behavior)

    -

    20 28

    nCQgs Gate-source charge 4

    Qgd Gate-drain charge 10

    1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.

    Table 6. Switching times

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    td(on) Turn-on delay time VDD = 250 V, ID = 2.2 A,

    RG = 4.7 Ω, VGS = 10 V

    (see Figure 15. Test circuit for resistive load switching times and Figure 20. Switching time waveform)

    -

    15

    - ns tr Rise time 10

    td(off) Turn-off delay time 32

    tf Fall time 15

    STB5NK50Z-1,STD5NK50ZT4,STP5NK50Z,STP5NK50ZFP,STU5NK50Z Electrical characteristics

    DS2834 - Rev 6 page 3/29

  • Table 7. Source drain diode

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    ISD Source-drain current -

    4.4 A

    ISDM (1) Source-drain current (pulsed) 17.6

    VSD (2) Forward on voltage ISD = 4.4 A, VGS = 0 V - 1.6 V

    trr Reverse recovery time ISD = 4.4 A, di/dt = 100 A/µs

    VDD = 30 V, Tj = 150°C (see Figure 17. Test circuit for inductive load switching and diode recovery times)

    -

    310 ns

    Qrr Reverse recovery charge 1.425 µC

    IRRM Reverse recovery current 9.2 A

    1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.

    Table 8. Gate-source Zener diode

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    V(BR)GSO Gate-source breakdown voltage IGS = ±1 mA, ID = 0 A ±30 - - V

    The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.

    STB5NK50Z-1,STD5NK50ZT4,STP5NK50Z,STP5NK50ZFP,STU5NK50Z Electrical characteristics

    DS2834 - Rev 6 page 4/29

  • 2.1 Electrical characteristics curves

    Figure 1. Safe operating area for I2PAK, DPAK, TO-220, IPAK

    Figure 2. Thermal impedance for I2PAK, DPAK, TO-220, IPAK

    Figure 3. Safe operating area for TO-220FP Figure 4. Thermal impedance for TO-220FP

    GC20940

    10 -1

    10 -2

    10 -3 10 -4 10 -3 10 -2 10 -1 10 0

    K

    t p (s)

    STB5NK50Z-1,STD5NK50ZT4,STP5NK50Z,STP5NK50ZFP,STU5NK50Z Electrical characteristics curves

    DS2834 - Rev 6 page 5/29

  • Figure 5. Output characterisics Figure 6. Transfer characteristics

    Figure 7. Static drain-source on resistance Figure 8. Gate charge vs gate-source voltage

    Figure 9. Capacitance variations Figure 10. Normalized gate threshold voltage vstemperature

    STB5NK50Z-1,STD5NK50ZT4,STP5NK50Z,STP5NK50ZFP,STU5NK50Z Electrical characteristics curves

    DS2834 - Rev 6 page 6/29

  • Figure 11. Normalized on resistance vs temperature Figure 12. Source-drain diode forward characteristic

    Figure 13. Normalized V(BR)DSS vs temperature

    V(BR)DSS (norm)

    Figure 14. Maximum avalanche energy vs temperature

    STB5NK50Z-1,STD5NK50ZT4,STP5NK50Z,STP5NK50ZFP,STU5NK50Z Electrical characteristics curves

    DS2834 - Rev 6 page 7/29

  • 3 Test circuits

    Figure 15. Test circuit for resistive load switching times

    AM01468v1

    VD

    RG

    RL

    D.U.T.

    2200 μF VDD

    3.3 μF+

    pulse width

    VGS

    Figure 16. Test circuit for gate charge behavior

    AM01469v1

    47 kΩ 1 kΩ

    47 kΩ

    2.7 kΩ

    1 kΩ

    12 V

    IG= CONST 100 Ω

    100 nF

    D.U.T.

    +pulse width VGS

    2200 μF

    VG

    VDD

    Figure 17. Test circuit for inductive load switching and diode recovery times

    AM01470v1

    A D

    D.U.T. S

    B

    G

    25 Ω

    A A

    B B

    RG

    G D

    S

    100 µH

    µF 3.3 1000

    µF VDD

    D.U.T.

    +

    _

    +

    fast diode

    Figure 18. Unclamped inductive load test circuit

    AM01471v1

    VD

    ID

    D.U.T.

    L

    VDD+

    pulse width

    Vi

    3.3 µF

    2200 µF

    Figure 19. Unclamped inductive waveform

    AM01472v1

    V(BR)DSS

    VDDVDD

    VD

    IDM

    ID

    Figure 20. Switching time waveform

    AM01473v1

    0

    VGS 90%

    VDS

    90%

    10%

    90%

    10%

    10%

    ton

    td(on) tr

    0

    toff

    td(off) tf

    STB5NK50Z-1,STD5NK50ZT4,STP5NK50Z,STP5NK50ZFP,STU5NK50Z Test circuits

    DS2834 - Rev 6 page 8/29

  • 4 Package information

    In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

    STB5NK50Z-1,STD5NK5