Data Sheet

2007 Fairchild Semiconductor Corporation 1 www.fairchildsemi.comFQP12N60C / FQPF12N60C Rev. B1

FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

September 2007

QFET FQP12N60C / FQPF12N60C 600V N-Channel MOSFETFeatures 12A, 600V, RDS(on) = 0.65 @VGS = 10 V Low gate charge ( typical 48 nC) Low Crss ( typical 21pF) Fast switching 100% avalanche tested Improved dv/dt capability RoHS compliant

DescriptionThese N-Channel enhancement mode power field effecttransistors are produced using Fairchilds proprietary, planarstripe, DMOS technology.This advanced technology has been especially tailored tominimize on-state resistance, provide superior switchingperformance, and withstand high energy pulse in the avalancheand commutation mode. These devices are well suited for highefficient switched mode power supplies, active power factorcorrection, electronic lamp ballast based on half bridgetopology.

Absolute Maximum Ratings

*Drain current limited by maximum junction temperature

Thermal Characteristics

TO-220FQP Series

G SDTO-220FFQPF Series

G SD

D

G

S

Symbol Parameter FQP12N60C FQPF12N60C UnitVDSS Drain-Source Voltage 600 V

ID Drain Current - Continuous (TC = 25C)- Continuous (TC = 100C)

127.4

12*7.4*

AA

IDM Drain Current - Pulsed (Note 1) 48 48* A

VGSS Gate-Source voltage 30 VEAS Single Pulsed Avalanche Energy (Note 2) 870 mJ

IAR Avalanche Current (Note 1) 12 A

EAR Repetitive Avalanche Energy (Note 1) 22.5 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns

PD Power Dissipation (TC = 25C)- Derate above 25C

2251.78

510.41

WW/C

TJ, TSTG Operating and Storage Temperature Range -55 to +150 CTL Maximum Lead Temperature for Soldering Purpose,

1/8 from Case for 5 Seconds 300 C

Symbol Parameter FQP12N60C FQPF12N60C UnitRJC Thermal Resistance, Junction-to-Case 0.56 2.43 C/WRJS Thermal Resistance, Case-to-Sink Typ. 0.5 -- C/WRJA Thermal Resistance, Junction-to-Ambient 62.5 62.5 C/W

2 www.fairchildsemi.comFQP12N60C / FQPF12N60C Rev. B1

FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

Package Marking and Ordering Information

Electrical Characteristics TC = 25C unless otherwise noted

Notes:1. Repetitive Rating: Pulse width limited by maximum junction temperature

2. L = 11mH, IAS = 12A, VDD = 50V, RG = 25, Starting TJ = 25C3. ISD 12A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C4. Pulse Test: Pulse width 300s, Duty Cycle 2%5. Essentially Independent of Operating Temperature Typical Characteristics

Device Marking Device Package Reel Size Tape Width QuantityFQP12N60C FQP12N60C TO-220 - - 50

FQPF12N60C FQPF12N60C TO-220F - - 50

Symbol Parameter Conditions Min Typ Max UnitsOff Characteristics

BVDSS Drain-Source Breakdown Voltage VGS = 0V, ID = 250A, TJ = 25C 600 -- -- VBVDSS/ TJ

Breakdown Voltage Temperature Coefficient ID = 250A, Referenced to 25C -- 0.5 -- V/C

IDSS Zero Gate Voltage Drain Current VDS = 600V, VGS = 0VVDS = 480V, TC = 125C

----

----

110

AA

IGSSF Gate-Body Leakage Current, Forward VGS = 30V, VDS = 0V -- -- 100 nA

IGSSR Gate-Body Leakage Current, Reverse VGS = -30V, VDS = 0V -- -- -100 nA

On Characteristics

VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250A 2.0 -- 4.0 VRDS(on) Static Drain-Source

On-Resistance VGS = 10V, ID = 6A -- 0.53 0.65 gFS Forward Transconductance VDS = 40V, ID = 6A (Note 4) -- 13 -- S

Dynamic Characteristics

Ciss Input Capacitance VDS = 25V, VGS = 0V,f = 1.0MHz

-- 1760 2290 pF

Coss Output Capacitance -- 182 235 pF

Crss Reverse Transfer Capacitance -- 21 28 pF

Switching Characteristics

td(on) Turn-On Delay Time VDD = 300V, ID = 12ARG = 25

(Note 4, 5)

-- 30 70 ns

tr Turn-On Rise Time -- 85 180 ns

td(off) Turn-Off Delay Time -- 140 280 ns

tf Turn-Off Fall Time -- 90 190 ns

Qg Total Gate Charge VDS = 400V, ID = 12AVGS = 10V

(Note 4, 5)

-- 48 63 nC

Qgs Gate-Source Charge -- 8.5 -- nC

Qgd Gate-Drain Charge -- 21 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain-Source Diode Forward Current -- -- 12 A

ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 48 A

VSD Drain-Source Diode Forward Voltage VGS = 0V, IS = 12A -- -- 1.4 V

trr Reverse Recovery Time VGS = 0V, IS = 12AdIF/dt =100A/s (Note 4)

-- 420 -- ns

Qrr Reverse Recovery Charge -- 4.9 -- C


FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward VoltageDrain Current and Gate Voltage Variation vs. Source Current

and Temperatue

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

100 101

100

101

VGSTop : 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 VBottom : 4.5 V

Notes : 1. 250s Pulse Test 2. TC = 25

I D, D

rain

Cur

rent

[A]

VDS, Drain-Source Voltage [V]

2 4 6 8 1010-1

100

101

150oC

25oC-55oC

Notes : 1. VDS = 40V 2. 250s Pulse Test

I D, D

rain

Cur

rent

[A]

VGS, Gate-Source Voltage [V]

0 5 10 15 20 25 30 35

0.5

1.0

1.5

VGS = 20V

VGS = 10V

Note : T J = 25

RDS

(ON) [

],D

rain

-Sou

rce

On-

Res

ista

nce

ID, Drain Current [A]0.2 0.4 0.6 0.8 1.0 1.2 1.4

10-1

100

101

150

Notes : 1. VGS = 0V 2. 250s Pulse Test

25

I DR, R

ever

se D

rain

Cur

rent

[A]

VSD, Source-Drain voltage [V]

10-1 100 1010

500

1000

1500

2000

2500

3000

3500Ciss = Cgs + Cgd (Cds = shorted)Coss = Cds + CgdCrss = Cgd

Notes ; 1. VGS = 0 V 2. f = 1 MHzCrss

Coss

Ciss

Cap

acita

nce

[pF]


0 10 20 30 40 500

2

4

6

8

10

12

VDS = 300V

VDS = 120V

VDS = 480V

Note : I D = 12A

V GS,

Gat

e-So

urce

Vol

tage

[V]

QG, Total Gate Charge [nC]


FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation vs. Temperature vs. Temperature

Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area for FQP12N60C for FQPF12N60C

Figure 10. Maximum Drain Current vs. Case Temperature

-100 -50 0 50 100 150 2000.8

0.9

1.0

1.1

1.2

Notes : 1. VGS = 0 V 2. ID = 250 A

BVDS

S, (N

orm

aliz

ed)

Dra

in-S

ourc

e Br

eakd

own

Volta

ge

TJ, Junction Temperature [oC]

-100 -50 0 50 100 150 2000.0

0.5

1.0

1.5

2.0

2.5

3.0

Notes : 1. VGS = 10 V 2. ID = 6.0 A

RDS

(ON), (

Nor

mal

ized

)D

rain

-Sou

rce

On-

Res

ista

nce

TJ, Junction Temperature [oC]

100 101 102 10310-2

10-1

100

101

102

100 ms

10 s

DC

10 ms1 ms

100 s

Operation in This Area is Limited by R DS(on)

Notes : 1. TC = 25

oC 2. TJ = 150

oC 3. Single Pulse

I D, D

rain

Cur

rent

[A]

VDS, Drain-Source Voltage [V]100 101 102 103

10-2

10-1

100

101

102

100 ms

10 s

DC

10 ms1 ms

100 s

Operation in This Area is Limited by R DS(on)

Notes : 1. TC = 25

oC 2. TJ = 150

oC 3. Single Pulse

I D, D

rain

Cur

rent

[A]


25 50 75 100 125 1500

2

4

6

8

10

12

14

I D, D

rain

Cur

rent

[A]

TC, Case Temperature [ ]


FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

Typical Performance Characteristics (Continued)

Figure 11-1. Transient Thermal Response Curve for FQP12N60C

Figure 11-2. Transient Thermal Response Curve for FQPF12N60C

1 0 -5 1 0 -4 1 0 -3 1 0 -2 1 0 -1 1 0 0 1 0 1

1 0 -2

1 0 -1

1 0 0

N o tes : 1 . Z JC(t) = 0 .56 /W M a x . 2 . D u ty F a c to r, D = t1/t2 3 . T JM - T C = P D M * Z JC(t)

s in g le p u ls e

D = 0 .5

0 .0 2

0 .2

0 .0 5

0 .1

0 .0 1

Z JC

(t), T

herm

al R

espo

nse

t 1, S q u a re W a v e P u ls e D u ra tio n [s e c ]

t1

PDM

t2

1 0 -5 1 0 -4 1 0 -3 1 0 -2 1 0 -1 1 0 0 1 0 1

1 0 -2

1 0 -1

1 0 0

N o tes : 1 . Z JC(t) = 2 .43 /W M ax . 2 . D u ty F ac to r, D = t1/t2 3 . T JM - T C = P D M * Z JC(t)

s in g le p u ls e

D = 0 .5

0 .0 2

0 .2

0 .0 5

0 .1

0 .0 1

Z JC

(t), T

herm

al R

espo

nse

t 1, S q u a re W a v e P u ls e D u ra tio n [s e c ]

t1

PDM

t2


FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & Waveforms


FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

Peak Diode Recovery dv/dt Test Circuit & Waveforms


FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

Mechanical Dimensions

4.50 0.209.90 0.20

1.52 0.10

0.80 0.102.40 0.20

10.00 0.20

1.27 0.10

3.60 0.10

(8.70)

2.80

0.1

015

.90

0.2

0

10.0

8 0

.30

18.9

5MAX

.

(1.70

)

(3.70

)(3.

00)

(1.46

)(1.

00)

(45)

9.20

0.2

013

.08

0.2

0

1.30

0.1

0

1.30 +0.100.05

0.50 +0.100.05

2.54TYP[2.54 0.20]

2.54TYP[2.54 0.20]

TO-220

Dimensions in Millimeters


FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

Mechanical Dimensions (Continued)

(7.00) (0.70)

MAX1.47

(30)

#1

3.30

0.1

015

.80

0.2

0

15.8

7 0

.20

6.68

0.2

0

9.75

0.3

0

4.70

0.2

0

10.16 0.20

(1.00x45)

2.54 0.20

0.80 0.10

9.40 0.20

2.76 0.200.35 0.10

3.18 0.10

2.54TYP[2.54 0.20]

2.54TYP[2.54 0.20]

0.50 +0.100.05

TO-220F

Dimensions in Millimeters

10 www.fairchildsemi.com10 www.fairchildsemi.com

FQP12N

60C / FQ

PF12N60C

600V N-C

hannel MO

SFET

FQP12N60C / FQPF12N60C Rev. B1

TRADEMARKSThe following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.

DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTSHEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THEAPPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDERITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILDSWORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICYFAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES ORSYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body or (b)support or sustain life, and (c) whose failure to perform whenproperly used in accordance with instructions for use providedin the labeling, can be reasonably expected to result in asignificant injury to the user.

2. A critical component in any component of a life support,device, or system whose failure to perform can be reasonablyexpected to cause the failure of the life support device orsystem, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONSDefinition of Terms

ACExBuild it NowCorePLUSCROSSVOLTCTLCurrent Transfer LogicEcoSPARK

FairchildFairchild SemiconductorFACT Quiet SeriesFACTFASTFastvCoreFPSFRFETGlobal Power ResourceSM

Green FPSGreen FPS e-SeriesGTOi-LoIntelliMAXISOPLANARMegaBuckMICROCOUPLERMicroFETMicroPakMillerDriveMotion-SPMOPTOLOGICOPTOPLANAR

PDP-SPMPower220

Power247POWEREDGEPower-SPMPowerTrenchProgrammable Active DroopQFETQSQT OptoelectronicsQuiet SeriesRapidConfigureSMART STARTSPMSTEALTHSuperFETSuperSOT-3SuperSOT-6

SuperSOT-8SyncFETThe Power Franchise

TinyBoostTinyBuckTinyLogicTINYOPTOTinyPowerTinyPWMTinyWireSerDesUHCUniFETVCX

Datasheet Identification Product Status Definition

Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

Preliminary First ProductionThis datasheet contains preliminary data; supplementary data will be pub-lished at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

Obsolete Not In ProductionThis datasheet contains specifications on a product that has been discontin-ued by Fairchild Semiconductor. The datasheet is printed for reference infor-mation only.

Rev. I31

Data Sheet

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