CSD18563Q5A 60 V N-Channel NexFET Power MOSFET datasheet … · 2020. 12. 16. · 0 3 6 9 12 15 18...

13
0 3 6 9 12 15 18 21 24 0 2 4 6 8 10 12 14 16 18 20 V GS - Gate-to- Source Voltage (V) R DS(on29 - On-State Resistance (m) T C = 25°C, I D = 18A T C = 125°C, I D = 18A G001 0 1 2 3 4 5 6 7 8 9 10 0 2 4 6 8 10 12 14 16 Q g - Gate Charge (nC) V GS - Gate-to-Source Voltage (V) I D = 18A V DS = 30V G001 1 D 2 D 3 D 4 D D 5 G 6 S 7 S 8 S P0093-01 Product Folder Sample & Buy Technical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD18563Q5A SLPS444C – JULY 2013 – REVISED JANUARY 2016 CSD18563Q5A 60 V N-Channel NexFET™ Power MOSFET 1 1 Features 1Ultra-Low Q g and Q gd Soft Body Diode for Reduced Ringing Low Thermal Resistance Avalanche Rated Logic Level Pb-Free Terminal Plating RoHS Compliant Halogen Free SON 5 mm × 6 mm Plastic Package 2 Applications Low-Side FET for Industrial Buck Converter Secondary Side Synchronous Rectifier Motor Control 3 Description This 5.7 mΩ, 60 V SON 5 mm × 6 mm NexFET™ power MOSFET was designed to pair with the CSD18537NQ5A control FET and act as the sync FET for a complete industrial buck converter chipset solution. Top View Product Summary T A = 25°C TYPICAL VALUE UNIT V DS Drain-to-Source Voltage 60 V Q g Gate Charge Total (10 V) 15.0 nC Q gd Gate Charge Gate-to-Drain 2.9 nC R DS(on) Drain-to-Source On-Resistance V GS = 4.5 V 8.6 mV GS = 10 V 5.7 mV GS(th) Threshold Voltage 2.0 V . Ordering Information (1) DEVICE MEDIA QTY PACKAGE SHIP CSD18563Q5A 13-Inch Reel 2500 SON 5 × 6 mm Plastic Package Tape and Reel CSD18563Q5AT 7-Inch Reel 250 (1) For all available packages, see the orderable addendum at the end of the data sheet. Absolute Maximum Ratings T A = 25°C VALUE UNIT V DS Drain-to-Source Voltage 60 V V GS Gate-to-Source Voltage ±20 V I D Continuous Drain Current (Package limited) 100 A Continuous Drain Current (Silicon limited), T C = 25°C 93 Continuous Drain Current (1) 15 I DM Pulsed Drain Current (2) 251 A P D Power Dissipation (1) 3.2 W Power Dissipation, TC = 25°C 116 T J , T stg Operating Junction Temperature, Storage Temperature –55 to 150 °C E AS Avalanche Energy, single pulse I D = 54 A, L = 0.1 mH, R G = 25 146 mJ (1) Typical R θJA = 40°C/W on a 1 inch 2 , 2 oz. Cu pad on a 0.06 inch thick FR4 PCB. (2) Max R θJC = 1.3°C/W, pulse duration 100 μs, duty cycle 1%. R DS(on) vs V GS Gate Charge

Transcript of CSD18563Q5A 60 V N-Channel NexFET Power MOSFET datasheet … · 2020. 12. 16. · 0 3 6 9 12 15 18...

  • 0

    3

    6

    9

    12

    15

    18

    21

    24

    0 2 4 6 8 10 12 14 16 18 20VGS - Gate-to- Source Voltage (V)

    RD

    S(o

    n) -

    On-

    Sta

    te R

    esis

    tanc

    e (

    mΩ

    ) TC = 25°C, I D = 18ATC = 125°C, I D = 18A

    G001

    0

    1

    2

    3

    4

    5

    6

    7

    8

    9

    10

    0 2 4 6 8 10 12 14 16Qg - Gate Charge (nC)

    VG

    S -

    Gat

    e-to

    -Sou

    rce

    Vol

    tage

    (V

    ) ID = 18AVDS = 30V

    G001

    1 D

    2 D

    3 D

    4

    D

    D5G

    6S

    7S

    8S

    P0093-01

    Product

    Folder

    Sample &Buy

    Technical

    Documents

    Tools &

    Software

    Support &Community

    An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.

    CSD18563Q5ASLPS444C –JULY 2013–REVISED JANUARY 2016

    CSD18563Q5A 60 V N-Channel NexFET™ Power MOSFET

    1

    1 Features1• Ultra-Low Qg and Qgd• Soft Body Diode for Reduced Ringing• Low Thermal Resistance• Avalanche Rated• Logic Level• Pb-Free Terminal Plating• RoHS Compliant• Halogen Free• SON 5 mm × 6 mm Plastic Package

    2 Applications• Low-Side FET for Industrial Buck Converter• Secondary Side Synchronous Rectifier• Motor Control

    3 DescriptionThis 5.7 mΩ, 60 V SON 5 mm × 6 mm NexFET™power MOSFET was designed to pair with theCSD18537NQ5A control FET and act as the syncFET for a complete industrial buck converter chipsetsolution.

    Top View

    Product SummaryTA = 25°C TYPICAL VALUE UNIT

    VDS Drain-to-Source Voltage 60 V

    Qg Gate Charge Total (10 V) 15.0 nC

    Qgd Gate Charge Gate-to-Drain 2.9 nC

    RDS(on) Drain-to-Source On-ResistanceVGS = 4.5 V 8.6 mΩ

    VGS = 10 V 5.7 mΩ

    VGS(th) Threshold Voltage 2.0 V

    .Ordering Information(1)

    DEVICE MEDIA QTY PACKAGE SHIP

    CSD18563Q5A 13-Inch Reel 2500 SON 5 × 6 mmPlastic Package

    Tape andReelCSD18563Q5AT 7-Inch Reel 250

    (1) For all available packages, see the orderable addendum atthe end of the data sheet.

    Absolute Maximum RatingsTA = 25°C VALUE UNIT

    VDS Drain-to-Source Voltage 60 V

    VGS Gate-to-Source Voltage ±20 V

    ID

    Continuous Drain Current (Package limited) 100

    AContinuous Drain Current (Silicon limited),TC = 25°C93

    Continuous Drain Current(1) 15

    IDM Pulsed Drain Current(2) 251 A

    PDPower Dissipation(1) 3.2

    WPower Dissipation, TC = 25°C 116

    TJ,Tstg

    Operating Junction Temperature,Storage Temperature –55 to 150 °C

    EASAvalanche Energy, single pulseID = 54 A, L = 0.1 mH, RG = 25 Ω

    146 mJ

    (1) Typical RθJA = 40°C/W on a 1 inch2, 2 oz. Cu pad on a 0.06inch thick FR4 PCB.

    (2) Max RθJC = 1.3°C/W, pulse duration ≤100 μs, duty cycle ≤1%.

    RDS(on) vs VGS Gate Charge

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.com/product/CSD18563Q5A?dcmp=dsproject&hqs=pfhttp://www.ti.com/product/CSD18563Q5A?dcmp=dsproject&hqs=sandbuysamplebuyhttp://www.ti.com/product/CSD18563Q5A?dcmp=dsproject&hqs=tddoctype2http://www.ti.com/product/CSD18563Q5A?dcmp=dsproject&hqs=swdesKithttp://www.ti.com/product/CSD18563Q5A?dcmp=dsproject&hqs=supportcommunity

  • 2

    CSD18563Q5ASLPS444C –JULY 2013–REVISED JANUARY 2016 www.ti.com

    Product Folder Links: CSD18563Q5A

    Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated

    Table of Contents1 Features .................................................................. 12 Applications ........................................................... 13 Description ............................................................. 14 Revision History..................................................... 25 Specifications......................................................... 3

    5.1 Electrical Characteristics........................................... 35.2 Thermal Information .................................................. 35.3 Typical MOSFET Characteristics.............................. 4

    6 Device and Documentation Support.................... 7

    6.1 Community Resources.............................................. 76.2 Trademarks ............................................................... 76.3 Electrostatic Discharge Caution................................ 76.4 Glossary .................................................................... 7

    7 Mechanical, Packaging, and OrderableInformation ............................................................. 87.1 Q5A Package Dimensions ........................................ 87.2 Recommended PCB Pattern..................................... 97.3 Recommended Stencil Opening ............................. 107.4 Q5A Tape and Reel Information ............................. 10

    4 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

    Changes from Revision B (January 2015) to Revision C Page

    • Added "Soft Body Diode for Reduced Ringing" under Features ........................................................................................... 1• Added "Low-Side FET for Industrial Buck Converter" to Applications ................................................................................... 1• Updated the part description ................................................................................................................................................. 1• Added the Community Resources section ............................................................................................................................. 7

    Changes from Revision A (January 2014) to Revision B Page

    • Increased silicon limited continuous drain current to 93 A .................................................................................................... 1• Increased Pulsed Drain Current to 251 ................................................................................................................................. 1• Added line for max power dissipation with case temperature held to 25° C.......................................................................... 1• Updated pulsed current conditions ........................................................................................................................................ 1• Changed Figure 1 to normalized RθJC curve ......................................................................................................................... 4• Updated SOA in Figure 10 .................................................................................................................................................... 6

    Changes from Original (July 2013) to Revision A Page

    • Added more information to description................................................................................................................................... 1• Added small reel order number .............................................................................................................................................. 1• Removed TC = 25°C condition from continuous drain current (package limited) in Absolute Maximum Ratings table ......... 1• Changed Typ RθJA = 99°C/W to: RθJA = 100°C/W in Figure 1 ............................................................................................... 4• Added the Recommended Stencil Opening section............................................................................................................. 10

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.comhttp://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS444C&partnum=CSD18563Q5A

  • 3

    CSD18563Q5Awww.ti.com SLPS444C –JULY 2013–REVISED JANUARY 2016

    Product Folder Links: CSD18563Q5A

    Submit Documentation FeedbackCopyright © 2013–2016, Texas Instruments Incorporated

    5 Specifications

    5.1 Electrical Characteristics(TA = 25°C unless otherwise stated)

    PARAMETER TEST CONDITIONS MIN TYP MAX UNITSTATIC CHARACTERISTICSBVDSS Drain-to-source voltage VGS = 0 V, ID = 250 μA 60 VIDSS Drain-to-source leakage current VGS = 0 V, VDS = 48 V 1 μAIGSS Gate-to-source leakage current VDS = 0 V, VGS = 20 V 100 nAVGS(th) Gate-to-source threshold voltage VDS = VGS, ID = 250 μA 1.7 2.0 2.4 V

    RDS(on) Drain-to-source on resistanceVGS = 4.5 V, ID = 18 A 8.6 10.8 mΩVGS = 10 V, ID = 18 A 5.7 6.8 mΩ

    gfs Transconductance VDS = 30 V, ID = 18 A 60 SDYNAMIC CHARACTERISTICSCiss Input capacitance

    VGS = 0 V, VDS = 30 V, ƒ = 1 MHz1150 1500 pF

    Coss Output capacitance 280 364 pFCrss Reverse transfer capacitance 3.9 5.1 pFRG Series gate resistance 1.5 3.0 ΩQg Gate charge total (4.5 V)

    VDS = 30 V, ID = 18 A

    7.3 9.5nC

    Qg Gate charge total (10 V) 15 20Qgd Gate charge gate-to-drain 2.9 nCQgs Gate charge gate-to-source 3.3 nCQg(th) Gate charge at Vth 2.3 nCQoss Output charge VDS = 30 V, VGS = 0 V 36 nCtd(on) Turn on delay time

    VDS = 30 V, VGS = 10 V, IDS = 18 A, RG = 0 Ω

    3.2 nstr Rise time 6.3 nstd(off) Turn off delay time 11.4 nstf Fall time 1.7 nsDIODE CHARACTERISTICSVSD Diode forward voltage ISD = 18 A, VGS = 0 V 0.8 1 VQrr Reverse recovery charge VDS= 30 V, IF = 18 A, di/dt = 300 A/μs

    63 nCtrr Reverse recovery time 49 ns

    (1) RθJC is determined with the device mounted on a 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu pad on a 1.5 inch × 1.5 inch (3.81 cm ×3.81 cm), 0.06 inch (1.52 mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.

    (2) Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.

    5.2 Thermal Information(TA = 25°C unless otherwise stated)

    THERMAL METRIC MIN TYP MAX UNITRθJC Junction-to-case thermal resistance (1) 1.3 °C/WRθJA Junction-to-ambient thermal resistance (1) (2) 50

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.comhttp://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS444C&partnum=CSD18563Q5A

  • GATE Source

    DRAIN

    N-Chan 5x6 QFN TTA MAX Rev3

    M0137-01

    GATE Source

    DRAIN

    N-Chan 5x6 QFN TTA MIN Rev3

    M0137-02

    4

    CSD18563Q5ASLPS444C –JULY 2013–REVISED JANUARY 2016 www.ti.com

    Product Folder Links: CSD18563Q5A

    Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated

    Max RθJA = 50°C/Wwhen mounted on1 inch2 (6.45 cm2) of2 oz. (0.071 mm thick)Cu.

    Max RθJA = 125°C/Wwhen mounted on aminimum pad area of2 oz. (0.071 mm thick)Cu.

    5.3 Typical MOSFET Characteristics(TA = 25°C unless otherwise stated)

    Figure 1. Transient Thermal Impedance

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.comhttp://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS444C&partnum=CSD18563Q5A

  • 1

    1.2

    1.4

    1.6

    1.8

    2

    2.2

    2.4

    2.6

    −75 −25 25 75 125 175TC - Case Temperature (ºC)

    VG

    S(th

    ) - T

    hres

    hold

    Vol

    tage

    (V

    )

    ID = 250uA

    G001

    0

    3

    6

    9

    12

    15

    18

    21

    24

    0 2 4 6 8 10 12 14 16 18 20VGS - Gate-to- Source Voltage (V)

    RD

    S(o

    n) -

    On-

    Sta

    te R

    esis

    tanc

    e (

    mΩ

    ) TC = 25°C, I D = 18ATC = 125°C, I D = 18A

    G001

    0

    1

    2

    3

    4

    5

    6

    7

    8

    9

    10

    0 2 4 6 8 10 12 14 16Qg - Gate Charge (nC)

    VG

    S -

    Gat

    e-to

    -Sou

    rce

    Vol

    tage

    (V

    ) ID = 18AVDS = 30V

    G001

    1

    10

    100

    1000

    1000020000

    0 10 20 30 40 50 60VDS - Drain-to-Source Voltage (V)

    C −

    Cap

    acita

    nce

    (pF

    )Ciss = Cgd + CgsCoss = Cds + CgdCrss = Cgd

    G001

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180

    200

    0 1 2 3 4 5VDS - Drain-to-Source Voltage (V)

    I DS -

    Dra

    in-t

    o-S

    ourc

    e C

    urre

    nt (

    A)

    VGS =10VVGS =6VVGS =4.5V

    G001

    0

    10

    20

    30

    40

    50

    60

    70

    80

    90

    100

    0 1 2 3 4 5 6VGS - Gate-to-Source Voltage (V)

    I DS -

    Dra

    in-t

    o-S

    ourc

    e C

    urre

    nt (

    A)

    TC = 125°CTC = 25°CTC = −55°C

    VDS = 5V

    G001

    5

    CSD18563Q5Awww.ti.com SLPS444C –JULY 2013–REVISED JANUARY 2016

    Product Folder Links: CSD18563Q5A

    Submit Documentation FeedbackCopyright © 2013–2016, Texas Instruments Incorporated

    Typical MOSFET Characteristics (continued)(TA = 25°C unless otherwise stated)

    Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics

    Figure 4. Gate Charge Figure 5. Capacitance

    Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-To-Source Voltage

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.comhttp://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS444C&partnum=CSD18563Q5A

  • 0

    20

    40

    60

    80

    100

    120

    −50 −25 0 25 50 75 100 125 150 175TC - Case Temperature (ºC)

    I DS -

    Dra

    in-

    to-

    Sou

    rce

    Cur

    rent

    (A

    )

    G001

    0.1

    1

    10

    100

    1000

    5000

    0.1 1 10 100VDS - Drain-to-Source Voltage (V)

    I DS -

    Dra

    in-t

    o-S

    ourc

    e C

    urre

    nt (

    A) 10us

    100us1ms10ms

    DC

    Single PulseMax RthetaJC = 1.3ºC/W

    G001

    10

    100

    0.01 0.1 1TAV - Time in Avalanche (mS)

    I AV -

    Pea

    k A

    vala

    nche

    Cur

    rent

    (A

    ) TC = 25ºCTC = 125ºC

    G001

    0.3

    0.6

    0.9

    1.2

    1.5

    1.8

    2.1

    2.4

    −75 −25 25 75 125 175TC - Case Temperature (ºC)

    Nor

    mal

    ized

    On-

    Sta

    te R

    esis

    tanc

    e

    VGS = 4.5VVGS = 10V

    ID =18A

    G001

    0.0001

    0.001

    0.01

    0.1

    1

    10

    100

    0 0.2 0.4 0.6 0.8 1VSD − Source-to-Drain Voltage (V)

    I SD −

    Sou

    rce-

    to-D

    rain

    Cur

    rent

    (A

    ) TC = 25°CTC = 125°C

    G001

    6

    CSD18563Q5ASLPS444C –JULY 2013–REVISED JANUARY 2016 www.ti.com

    Product Folder Links: CSD18563Q5A

    Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated

    Typical MOSFET Characteristics (continued)(TA = 25°C unless otherwise stated)

    Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage

    Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Unclamped Inductive Switching

    Figure 12. Maximum Drain Current vs Temperature

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.comhttp://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS444C&partnum=CSD18563Q5A

  • 7

    CSD18563Q5Awww.ti.com SLPS444C –JULY 2013–REVISED JANUARY 2016

    Product Folder Links: CSD18563Q5A

    Submit Documentation FeedbackCopyright © 2013–2016, Texas Instruments Incorporated

    6 Device and Documentation Support

    6.1 Community ResourcesThe following links connect to TI community resources. Linked contents are provided "AS IS" by the respectivecontributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms ofUse.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaborationamong engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and helpsolve problems with fellow engineers.

    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools andcontact information for technical support.

    6.2 TrademarksNexFET, E2E are trademarks of Texas Instruments.All other trademarks are the property of their respective owners.

    6.3 Electrostatic Discharge CautionThese devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.

    6.4 GlossarySLYZ022 — TI Glossary.

    This glossary lists and explains terms, acronyms, and definitions.

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.comhttp://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS444C&partnum=CSD18563Q5Ahttp://www.ti.com/corp/docs/legal/termsofuse.shtmlhttp://www.ti.com/corp/docs/legal/termsofuse.shtmlhttp://e2e.ti.comhttp://support.ti.com/http://www.ti.com/lit/pdf/SLYZ022

  • 12

    556

    781

    42

    3

    34

    67

    8

    8

    CSD18563Q5ASLPS444C –JULY 2013–REVISED JANUARY 2016 www.ti.com

    Product Folder Links: CSD18563Q5A

    Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated

    7 Mechanical, Packaging, and Orderable InformationThe following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and revisionof this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

    7.1 Q5A Package Dimensions

    DIMMILLIMETERS

    MIN NOM MAXA 0.90 1.00 1.10b 0.33 0.41 0.51c 0.20 0.25 0.34

    D1 4.80 4.90 5.00D2 3.61 3.81 4.02E 5.90 6.00 6.10E1 5.70 5.75 5.80E2 3.38 3.58 3.78E3 3.03 3.13 3.23e 1.17 1.27 1.37e1 0.27 0.37 0.47e2 0.15 0.25 0.35H 0.41 0.56 0.71K 1.10L 0.51 0.61 0.71L1 0.06 0.13 0.20θ 0° 12°

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.comhttp://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS444C&partnum=CSD18563Q5A

  • F10

    F11

    F6 F7

    F5

    F9

    F4

    F8

    145

    8

    M0139-01

    F2

    F3

    F1

    9

    CSD18563Q5Awww.ti.com SLPS444C –JULY 2013–REVISED JANUARY 2016

    Product Folder Links: CSD18563Q5A

    Submit Documentation FeedbackCopyright © 2013–2016, Texas Instruments Incorporated

    7.2 Recommended PCB Pattern

    DIMMILLIMETERS INCHES

    MIN MAX MIN MAXF1 6.205 6.305 0.244 0.248F2 4.46 4.56 0.176 0.18F3 4.46 4.56 0.176 0.18F4 0.65 0.7 0.026 0.028F5 0.62 0.67 0.024 0.026F6 0.63 0.68 0.025 0.027F7 0.7 0.8 0.028 0.031F8 0.65 0.7 0.026 0.028F9 0.62 0.67 0.024 0.026F10 4.9 5 0.193 0.197F11 4.46 4.56 0.176 0.18

    For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing ThroughPCB Layout Techniques.

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.comhttp://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS444C&partnum=CSD18563Q5Ahttp://www.ti.com/lit/pdf/SLPA005

  • Ø 1.50+0.10–0.00

    4.00 ±0.10 (See Note 1)

    1.7

    5 ±

    0.1

    0

    R 0.30 TYP

    Ø 1.50 MIN

    A0

    K0

    0.30 ±0.05

    R 0.30 MAX

    A0 = 6.50 ±0.10B0 = 5.30 ±0.10K0 = 1.40 ±0.10

    M0138-01

    2.00 ±0.05

    8.00 ±0.10

    B012.0

    0 ±

    0.3

    0

    5.5

    0 ±

    0.0

    5

    4.310

    58 1

    4

    3.020

    0.500

    1.5701.270

    0.615 1.105

    0.500

    1.585 1.235

    0.620

    0.500

    (0.020) 8x

    (0.020)

    (0.020) 8x

    (0.024)

    (0.062)

    4x (0.050)

    (0.044)(0.024)

    (0.119)

    (0.062) (0.049)

    (0.170)

    0.385(0.015)

    10

    CSD18563Q5ASLPS444C –JULY 2013–REVISED JANUARY 2016 www.ti.com

    Product Folder Links: CSD18563Q5A

    Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated

    7.3 Recommended Stencil Opening

    7.4 Q5A Tape and Reel Information

    Notes:1. 10-sprocket hole-pitch cumulative tolerance ±0.22. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm3. Material: black static-dissipative polystyrene4. All dimensions are in mm (unless otherwise specified).5. A0 and B0 measured on a plane 0.3 mm above the bottom of the pocket.

    http://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.ti.comhttp://www.ti.com/product/csd18563q5a?qgpn=csd18563q5ahttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS444C&partnum=CSD18563Q5A

  • PACKAGE OPTION ADDENDUM

    www.ti.com 10-Dec-2020

    Addendum-Page 1

    PACKAGING INFORMATION

    Orderable Device Status(1)

    Package Type PackageDrawing

    Pins PackageQty

    Eco Plan(2)

    Lead finish/Ball material

    (6)

    MSL Peak Temp(3)

    Op Temp (°C) Device Marking(4/5)

    Samples

    CSD18563Q5A ACTIVE VSONP DQJ 8 2500 RoHS-Exempt& Green

    SN Level-1-260C-UNLIM -55 to 150 CSD18563

    CSD18563Q5A-P PREVIEW VSONP DQJ 8 2500 RoHS-Exempt& Green

    SN Level-1-260C-UNLIM -55 to 150 CSD18563

    CSD18563Q5AT ACTIVE VSONP DQJ 8 250 RoHS-Exempt& Green

    SN Level-1-260C-UNLIM -55 to 150 CSD18563

    (1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

    (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substancedo not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI mayreference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of

  • PACKAGE OPTION ADDENDUM

    www.ti.com 10-Dec-2020

    Addendum-Page 2

    In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

  • IMPORTANT NOTICE AND DISCLAIMER

    TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources.TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.

    Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2020, Texas Instruments Incorporated

    http://www.ti.com/legal/termsofsale.htmlhttp://www.ti.com

    1 Features2 Applications3 DescriptionTable of Contents4 Revision History5 Specifications5.1 Electrical Characteristics5.2 Thermal Information5.3 Typical MOSFET Characteristics

    6 Device and Documentation Support6.1 Community Resources6.2 Trademarks6.3 Electrostatic Discharge Caution6.4 Glossary

    7 Mechanical, Packaging, and Orderable Information7.1 Q5A Package Dimensions7.2 Recommended PCB Pattern7.3 Recommended Stencil Opening7.4 Q5A Tape and Reel Information