COM609 Topics in Embedded Systems - Korea...

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1 COM609 Topics in Embedded Systems μC/OS-II Porting to Spartan-3 Starter Board This tutorial presents instructions on how to port μC/OS-II to a Microblaze-based system. Microblaze is a 32-bit CPU from Xilinx. It is a soft core, meaning that it is NOT fused into the FPGA fabric. Instead, you can instantiate Microblaze in your design as you need, and download the system to FPGA. In this porting, we are going to use Spartan-3E Starter board, where Spartan-3E FPGA (XC3S500E-4FG320C) is mounted. Since the Spartan-3E is a small and low-cost device, it is not able to accommodate 64KB internal memory. μC/OS-II is a small and light-weight kernel. However, it seems that it requires more than 32KB memory as I experimented. Thus, we are going to use external memory (64MB DDR SDRAM) mounted on the board. The DDR is used for downloading μC/OS-II binary. To download the μC/OS-II binary to DDR, Xilinx provides xdm (Xilinx Debug Module), which is implemented using JTAG (Joint Test Action Group) boundary scan interface. This tutorial illustrates the whole procedure from hardware design (Microblaze-based system) to software (μC/OS-II) porting to the system. Note that you can learn about the embedded system design using XPS (Xilinx Platform Studio) from Xilinx XUP website at http://www.xilinx.com/university/index.htm . The porting is based on the Micrium porting instructions at http://micrium.com/page/downloads/ports/xilinx

Transcript of COM609 Topics in Embedded Systems - Korea...

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COM609 Topics in Embedded Systems

μC/OS-II Porting to Spartan-3 Starter Board

This tutorial presents instructions on how to port μC/OS-II to a Microblaze-based system. Microblaze is a 32-bit CPU from Xilinx. It is a soft core, meaning that it is NOT fused into the FPGA fabric. Instead, you can instantiate Microblaze in your design as you need, and download the system to FPGA. In this porting, we are going to use Spartan-3E Starter board, where Spartan-3E FPGA (XC3S500E-4FG320C) is mounted. Since the Spartan-3E is a small and low-cost device, it is not able to accommodate 64KB internal memory. μC/OS-II is a small and light-weight kernel. However, it seems that it requires more than 32KB memory as I experimented. Thus, we are going to use external memory (64MB DDR SDRAM) mounted on the board. The DDR is used for downloading μC/OS-II binary. To download the μC/OS-II binary to DDR, Xilinx provides xdm (Xilinx Debug Module), which is implemented using JTAG (Joint Test Action Group) boundary scan interface. This tutorial illustrates the whole procedure from hardware design (Microblaze-based system) to software (μC/OS-II) porting to the system. Note that you can learn about the embedded system design using XPS (Xilinx Platform Studio) from Xilinx XUP website at http://www.xilinx.com/university/index.htm. The porting is based on the Micrium porting instructions at http://micrium.com/page/downloads/ports/xilinx

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Create a hardware platform

1. Invoke XPS and Create a “ucos-ii-spartan3e” folder under c:/Xilinx/com609

2. Select Spartan-3E Starter Board

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3. Leave System Configuration (Single-Processor System) and Processor Configuration as default

4. Remove unnecessary devices from Peripheral Configuration

a. Remove Ethernet_MAC, FLASH, and RS232_DTE

5. Leave Cache Configuration and Application Configuration as default

6. Click on Start Using Platform Studio

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7. Add a ‘Timer/Counter’ and ‘Interrupt Controller’ from IP Catalog. a. Double-click ‘XPS Timer/Counter’ and then ok b. Double-click ‘XPS Interrupt Controller’ and then ok

8. Connect the Timer and Interrupt Controller to mb_plb (Microblaze Processor Local Bus). a. Select mb_plb from SPLB drop-down menu of xps_intc_0 b. Select mb_plb from SPLB drop-down menu of xps_timer_0

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9. Connect the interrupt controller output to the interrupt input in Microblaze. c. Select New Connection from the drop-down menu of INTERRUPT in microblaze_0

i. It will make a new signal named ‘microblaze_0_INTERRUPT’ d. Select microblaze_0_INTERRUPT from the drop-down menu of Interrupt

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10. Connect the interrupt output of Timer to the interrupt input of Interrupt Controller. a. Click (just one click) on L to H: No Connection in Intr of xps_timer_0 b. Select xps_timer_0:Interrupt and move it to the Connected Interrupt(s) pane

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11. Assign address space for Timer and Interrupt controller. a. Click on ‘Addresses’ tap b. Expand ‘Unmapped Addresses’ c. Click on ‘Generate Addresses’

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12. Change the UART baud to 115200 bps (bits per second). a. Double-click on RS232_DCE b. Select 115200 for baudrate

13. You are done with hardware system design. Yes, it is this simple! Now generate a bitstream by selecting Hardware → Generate Bitstream

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Porting μC/OS-II to the created hardware platform

1. Download uC/OS-II ports either from http://micrium.com/page/downloads/ports/xilinx or from http://comedu.korea.ac.kr/~suhtw/teaching/com609_TES/AN-1013.zip

2. Unzip AN-1013.zip to a temporary directory

a. Copy ‘uCOS-II_v2_90_a’ directory under C:\Xilinx\12.2\ISE_DS\EDK\sw\lib\bsp

b. Copy ‘ucos-II_hello_world’ directory under C:\Xilinx\12.2\ISE_DS\EDK\sw\lib\sw_apps

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3. Export the created hardware design to SDK a. Project → Export Hardware Design to SDK b. Click on Export & Launck SDK

4. In SDK, select File → New → Xilinx Board Support Package a. Select uCOS-II and click on Finish b. Set OS_SOURCE_LOCATION to your source directory

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5. Then, it will automatically build μC/OS-II

6. Now, let’s create a simple application running on top of μC/OS-II

a. Select uCOS-II_bsp_0, right-click, and select New → Project b. Select Xilinx C Project and then click Next

c. Select uC_OS-II Hello World

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d. Select Target an existing Board Support Package and click Finish • Then, you will encounter an error. It is because the C header file (bsp.h)

provided in AN-1013.zip does not match with what XPS had generated (xparameters.h)

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e. Refer to xparameters.h (generated when you created your hardware platform) under uCOS-II_bsp_0 → microblaze_0 → include

i. The Timer base address is declared as XPAR_XPS_TIMER_0_BASEADDR ii. Change the bsp.h appropriately (TIMER_1 → TIMER_0)

f. We are done with generating a binary of the software application with μC/OS-II

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Downloading to FPGA

Remember that our hardware platform does not have enough memory to accommodate the binary (S/W). So, we are going to use XMD for downloading the binary to DDR SDRAM on the board

1. Connect Spartan-3 board with your PC via a serial cable and a download cable

2. Open up a hyperterminal session on your PC with baudrate set to 115200

3. Change the link script, so the binary of application and μC/OS-II is located in DDR SDRAM

a. Xilinx Tools → Generate linker script

b. Browse to locate the link script. The link script is located at C:\Xilinx\com609\ucos-ii-spartan3e\SDK\SDK_Workspace_35\uc_os-ii_hello_world_0\src\lscript.ld

i. Change Code, Data, Heap and Stack places to DDR SDRAM ii. Click Generate

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4. Recompile the application code a. Place your mouse to an empty space of bsp.h (for example) and press Enter b. Save the file and it will automatically recompile the code

5. Xilinx Tools → Program FPGA

6. Then, Click Program

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7. Xilinx Tools → XMD Console

8. Change to the directory where your application binary is located. a. cd SDK b. cd SDK_Workspace_35 c. cd uc_os-ii_hello_world_0 d. cd Debug

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9. Connect to MDM (Microblaze Debug Module) in Microblaze system

10. Download the binary to DDR a. In the XMD Console, type dow uc_os-ii_hello_world_0.elf b. In the XMD Console, type con to execute the program

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11. You should be able to see the messages on the Hyperterminal a. You created 2 tasks: Each task is printing out an message to console

12. In the XMD console, type stop to stop the program execution. Close SDK and XPS