Analysis and Design of CS-LNA using 0.18μm CMOS...

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Vol 05, Article 02229; March 2014 International Journal of VLSI and Embedded Systems-IJVES http://ijves.com ISSN: 2249 – 6556 2010-2014 – IJVES Indexing in Process - EMBASE, EmCARE, Electronics & Communication Abstracts, SCIRUS, SPARC, GOOGLE Database, EBSCO, NewJour, Worldcat, DOAJ, and other major databases etc., 752 Analysis and Design of CS-LNA using 0.18μm CMOS Technology MONALI S. KHUNE, BHUSHAN R. VIDHALE Dept. of Electronics and Telecommunication Engineering, GHRCE,Nagpur (M.S.), India [email protected], [email protected] ABSTRACT The CS-LNA combines a low noise figure, reasonable gain, and stability without oscillation over entire useful frequency range. Low-noise amplifier (LNA) is an electronic amplifier used to amplify possibly very weak signals like captured by an antenna. Agilent's ADS tool has been used to simulate the behavior of active and passive components in the LNA circuit. The basic objective of the LNA design is to get good gain with minimum noise generation for the entire range of operating frequency. The designed LNA based on 0.18μm CMOS technology demonstrates a 14.4 dB voltage gain (S21), 0.41dB noise figure (NF), -12.59 dB impedance matching (S11) at 3.7GHz frequency with voltage supply of 1.8V. Keywords . parameters - s noise figure, , gain, Low noise amplifier 1. INTRODUCTION During the past decade, advances in IC technology have enabled the integration of RF front-ends with multiple analog and digital blocks on a single chip. The competitiveness of today's markets often forces designers to use inexpensive components in their designs. With the rapid development and large demand of wireless communication, the low-cost and highly integration has become the essential design targets for the recent communication ICs. Recently, many new wireless communication standards have been defined, and there will be more standards for various kinds of applications in the future. It is, therefore, desirable to develop a single mobile terminal compatible with several standards ranging from mobile telephone, Third-Generation System to Bluetooth. Different standards have different requirements on the transceivers, so one of the straight forward methods is to employ specific transceiver for each wireless standard. However, this is not an economical solution because of large chip size occupation. Using an LNA, the effect of noise from subsequent stages of the receive chain is reduced by the gain of the LNA, while the noise of the LNA itself is injected directly into the received signal. Thus, it is necessary for an LNA to boost the desired signal power while adding as little noise and distortion as possible, so that the retrieval of this signal is possible in the later stages in the system. The LNA is the outer most part of the transceiver. The LNA is responsible for providing enough gain to the signal with the least distortion possible. CMOS 0.18μm TSMC technology has been chosen for the design of the LNA at the transistor level. As many as five on chip inductors are implemented for the proper gain shaping over the frequency range of 2.4GHz to 6GHz. A noise figure less than 2dB is achieved to make sure noise contribution of the amplifier is as low as possible. 2. OVERVIEW The Low Noise Amplifier (LNA) is the first gain stage of a receiver. It must meet several specifications at the same time, which makes its design challenging. The signals coming from the receiver antenna are very small, usually from -100 dBm (3.2 V) to -70 dBm (0.1 mV), therefore signal amplification is needed before it is fed into the mixer. This process sets the requirement of a certain gain to the LNA. The received signal should have a certain Signal to Noise Ratio (SNR) in order to allow proper detection. Therefore, noise added by the circuit should be reduced as much as possible. A large signal or blocker can occur at the input of LNA. The circuits should be sufficiently linear in order to have a reasonable signal reception. For portable and mobile applications, reasonable power consumption is another constraint. i. RF concepts: RF behavior of any system regarding different applications is based on the following parameters - a. Reflection: There are a number of performance parameters that show what extent of impedances are matched. Firstly the Reflection Coefficient which by definition is the ratio of reflected wave to incident wave which expressed in terms of impedances. It is a complex entity that describes not only the magnitude of the reflection but also the phase shift. ΓL = Reflected wave/Incident wave = (Z L-Z S) / (Z L +Z S) A closely related parameter is the voltage standing wave ratio (VSWR), which is commonly talked about in transmission line applications. The VSWR is defined as the ratio of the maximum to the adjacent minimum voltage of the standing wave. VSWR= |V|max/|V|min = (1+|ΓL|) / (1-|ΓL|)

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Vol 05, Article 02229; March 2014 International Journal of VLSI and Embedded Systems-IJVES

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Analysis and Design of CS-LNA using 0.18μm CMOS Technology MONALI S. KHUNE, BHUSHAN R. VIDHALE

Dept. of Electronics and Telecommunication Engineering, GHRCE,Nagpur (M.S.), India

[email protected], [email protected]

ABSTRACT

The CS-LNA combines a low noise figure, reasonable gain, and stability without oscillation over entire useful

frequency range. Low-noise amplifier (LNA) is an electronic amplifier used to amplify possibly very weak

signals like captured by an antenna. Agilent's ADS tool has been used to simulate the behavior of active and

passive components in the LNA circuit. The basic objective of the LNA design is to get good gain with

minimum noise generation for the entire range of operating frequency. The designed LNA based on 0.18μm

CMOS technology demonstrates a 14.4 dB voltage gain (S21), 0.41dB noise figure (NF), -12.59 dB impedance

matching (S11) at 3.7GHz frequency with voltage supply of 1.8V.

Keywords – .parameters-s noise figure,, gain, Low noise amplifier

1. INTRODUCTION

During the past decade, advances in IC technology have enabled the integration of RF front-ends with multiple

analog and digital blocks on a single chip. The competitiveness of today's markets often forces designers to use

inexpensive components in their designs. With the rapid development and large demand of wireless

communication, the low-cost and highly integration has become the essential design targets for the recent

communication ICs. Recently, many new wireless communication standards have been defined, and there will

be more standards for various kinds of applications in the future. It is, therefore, desirable to develop a single

mobile terminal compatible with several standards ranging from mobile telephone, Third-Generation System to

Bluetooth. Different standards have different requirements on the transceivers, so one of the straight forward

methods is to employ specific transceiver for each wireless standard. However, this is not an economical

solution because of large chip size occupation. Using an LNA, the effect of noise from subsequent stages of the

receive chain is reduced by the gain of the LNA, while the noise of the LNA itself is injected directly into the

received signal. Thus, it is necessary for an LNA to boost the desired signal power while adding as little noise

and distortion as possible, so that the retrieval of this signal is possible in the later stages in the system. The

LNA is the outer most part of the transceiver. The LNA is responsible for providing enough gain to the signal

with the least distortion possible. CMOS 0.18µm TSMC technology has been chosen for the design of the LNA

at the transistor level. As many as five on chip inductors are implemented for the proper gain shaping over the

frequency range of 2.4GHz to 6GHz. A noise figure less than 2dB is achieved to make sure noise contribution of

the amplifier is as low as possible.

2. OVERVIEW

The Low Noise Amplifier (LNA) is the first gain stage of a receiver. It must meet several specifications at the

same time, which makes its design challenging. The signals coming from the receiver antenna are very small,

usually from -100 dBm (3.2 V) to -70 dBm (0.1 mV), therefore signal amplification is needed before it is fed

into the mixer. This process sets the requirement of a certain gain to the LNA. The received signal should have a

certain Signal to Noise Ratio (SNR) in order to allow proper detection. Therefore, noise added by the circuit

should be reduced as much as possible. A large signal or blocker can occur at the input of LNA. The circuits

should be sufficiently linear in order to have a reasonable signal reception. For portable and mobile applications,

reasonable power consumption is another constraint.

i. RF concepts: RF behavior of any system regarding different applications is based on the following

parameters -

a. Reflection: There are a number of performance parameters that show what extent of impedances are

matched. Firstly the Reflection Coefficient which by definition is the ratio of reflected wave to incident wave

which expressed in terms of impedances. It is a complex entity that describes not only the magnitude of the

reflection but also the phase shift. ΓL = Reflected wave/Incident wave

= (Z L-Z S) / (Z L +Z S)

A closely related parameter is the voltage standing wave ratio (VSWR), which is commonly talked about in

transmission line applications. The VSWR is defined as the ratio of the maximum to the adjacent minimum

voltage of the standing wave.

VSWR= |V|max/|V|min

= (1+|ΓL|) / (1-|ΓL|)

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b. Scattering parameters: Scattering parameters or s-parameters are complex numbers that exhibit how

voltage waves propagate in the radio-frequency (RF) environment. In matrix form they characterize the

complete RF behavior of a network.

Figure: A 2 –port with incident waves a₁ and a₂ and reflected waves b₁ and b₂.

S-parameters measurements are carried out by measuring wave ratios while systematically altering the

termination to cancel either forward gain or reverse gain according to following equations:

S₁₁ =b₁/a₁|a₂=0

S₁₂ = b₁/ a₂| a₁ =0

S₂₁ = b₂/a₁|a₂=0

S₂₂= b₂/a₂|a₁=0

Conclusively, the S-parameters relate the four waves in the following fashion:

b₁ = S₁₁ a₁+ S₁₂ a₂ b₂ = S₂₁a₁+ S₂₂a₂ Input return loss(S₁₁)- Input return loss(RL in) is a scalar measure of how close the actual input impedance of

the network is to the nominal system impedance value and, expressed in logarithmic magnitude .

RL in = |20log₁₀|S₁₁||dB.

Output return loss (S₂₂) - The output return loss (RL out) has a similar definition to the input return loss but

applies to the output port (port 2) instead of the input port.

RL out = |20log₁₀|S₂₂||dB

The s-parameters not only give a clear and meaningful physical interpretation of the network performance, but

also form a natural set of parameters for use with signal flow graphs.

c. The Quality Factor: The Quality Factor (Q) is a descriptive parameter of the rate of energy loss in complete

RLC networks or simply in individual inductors or capacitors.

Q RLC = ω Etot/ Pavg

QL = XL/R= ωL/R

QC = |XC|/R= 1/ωCR

ii. Low Noise amplifier Strategy:

The receiver features a Low Noise Amplifier (LNA) followed by a mixer (demodulator). The mixer removes the

carrier from the received radio frequency signal. Usually there is an automatic gain control block between the

mixer and the Analog to Digital Converter (ADC). The purpose of this block is to balance the amplification or

attenuation of the received signal in a way that it utilizes the maximum range of the ADC. The analog to digital

converter then converts the analog signals to digital data which is fed to the DSP to process the transmitted data.

The signal is then fed to the DSP block for baseband processing. In this context it is clear that an ultra wideband

LNA should pass all the frequencies between 3.1 to 10.6 GHz. Such an amplifier must feature wideband input

matching to a 50 Q antenna for noise optimization and filtering of the out-of-band interferers. Moreover, it must

show flat gain with good linearity and minimum possible noise figure over the entire bandwidth.

a. Amplifier's gain: There are two criteria that affect the gain performance of any RF amplifier: the RF

transistor itself and the input output matching network.

Power Gain = (Available power at output) / (Power at input)

b. Noise performance: The noise performance of an RF amplifier is represented by its noise factor or noise

figure. The noise factor accounts for the degradation of the signal's SNR due to the amplifier. It is defined as the

SNR at the input of the network divided by the SNR at the output of the network.

F = (SNRin /SNRout)

Where SNRjn and SNRout are the SNRs at the input and output of the amplifier, respectively. The noise factor

represents the signal's quality in terms of noise before and after the network. The noise figure is the same as the

noise factor expressed in dB;

NF (dB) = 101og F

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The importance of the gain and noise factor specifications on an LNA can be obtained from the receiver's

system sensitivity aspect. The smallest input signal power that can be reliably detected by the system is called

the system sensitivity (Ps);

The first two terms are usually referred to as the noise floor. BW is the system bandwidth and is determined by a

specific application. The SNR is determined by the Bit Error Rate (BER) requirement of the system. Ftot is the

system's total noise factor, and it is directly affected by the LNA's gain and noise factor. Ftot can be calculated

by:

Where FLNA is noise figure of the LNA, GLNA is the current gain of the LNA, and Fafter LNA is noise figure of

the system excluding the LNA. For high sensitivity a low system noise factor is required, therefore FLNA

should be made as small as possible. The second term of above equation shows that noise coming from the

stages following the LNA will be suppressed by the LNA's gain; hence a high gain LNA is desirable for high

sensitivity. On the other hand, a high gain of the first stage, which is the LNA in this case, will put a more

stringent linearity requirement on the following stages. Therefore a trade off must be made amongst gain, noise,

and linearity. The LNA usually only involves one or two transistors to achieve low noise operation. The

performance of the LNA circuits is very dependent on

process technology. CMOS technologies are the best choice to design an LNA because they offer high speed

operation, simplicity in fabrication, and low power consumption.

3. LITERATURE SURVEY

The LNA acquired a System which is more reconfigurable directly to achieve advantageous and free fault one.

The similar work is done by Jigisha Sureja et.Al. [8] Proposed a technique to attain the wide bandwidth LNA of

0.18µm CMOS technology for a single stage 0.1-3GHz wideband LNA. This paper analyzes cascode common

source structure of LNA where T-coil network can be implemented as a high order filter for bandwidth

extension. The CMOS process, which is viewed positively because it can be used in the realization of low-cost,

highly integrated RF transceivers, is desirable for small, light, low power, low-cost terminal equipment. A. N.

Ragheb et.Al.[11] has designed and simulated the LNA by a TSMC 0.18 µm process for UWB impulse-radio

receivers. He focussed on low power consumption and noise figure, high and flat gain, and good input and

output matching. Yu-Lin Wang et.Al. [12] gives s CMOS LNA with three cascade circuits can enhance the gain

and bandwidth, middle inductor can suppress the miller effect, and used the RC feedback network to maintain

the flatness.

In 2013 Md. Asif Mahmood Chowdhury in [18] has been used CS-CS Cascaded stage topology of LNA which

offers higher gain and bandwidth compared to other topologies of LNA implementation and giving the

optimized LNA parameters like high gain, bandwidth, centre frequency, power consumption. Ehsan Kargaran

et.Al.[22] proposed LNAs deliver 3dB power gains more than conventional folded cascode, while consuming

1.3mW dc power with an ultra low supply voltage of 0.6V. It also shows that the proposed LNAs are suitable

for ultra low power and ultra low voltage applications and Design of RF CMOS LNAs using the parasitic input

resistance of a MOSFET is presented.

4. PROPOSED CURCUIT DESIGN

Low noise amplifier (LNA) is one of the most important building blocks in the front end of the

telecommunication system. Because the first block that a signal fed from antenna meets is LNA, it determines

the noise figure of the overall system. Its main function is to amplify the input signal without adding extra noise

to the received signal with the appropriate power consumption. Below design of LNA schematic is shown which

is simulated in TSMC RF CMOS 0.18μm technology. It consists of lumped dc components (R, L, C) have

different value at input and output side of circuit. As there is common source topology of LNA is used which

either grounded or common to both input and output side. For mismatching of current drive at both drain levels,

the current probe is used. Voltage supply of 1.8V is given to gate of transistor (NMOS).By providing essential

values of R, L, C in cascade and shunt ways the whole schematic is designed in agilent’s Advance digital

system software (ADS).As it provides the function to choose the parameters automatically for the user, provided

that it gives the optimization target. In a word, agilent’s ADS are powerful for the circuit design at RF

frequency. LNA designing needs to put several aspects into consideration, such as high gain, low noise figure,

good input and output matching, stability and linearity. These factors are not independent from each other, and

the unconditional stability often need to sacrifice part of the gain as compensation, and high linearity usually

require high-current, and minimum noise figure is obtained at a lower current.

A. Technology introduction

The amplifier is designed using 0.18μm CMOS (Complementary Metal-oxide Semiconductor) based

technology. It provides transistors with cutoff frequencies in the range of 2.4GHz (ISM band) to 5GHz.Beside

Ps = 174dBm + 10 log BW + SNR + 10 log Ftot

F tot= FLNA + [(Fafter LNA- 1) / G L N A)]

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above; the technology also gives low power consumption and strong reliability. As 3G demands for lower cost,

small size, long battery lifetime; programmable CMOS solution support Multi-dimensional and Multi-standard

applications.

B. Topology

Common source topology of LNA requires low bandwidth of operation. It provides high gain and corresponding

low noise figure with moderate power consumption. It has good impedance matching and linearity in order to

lower the distortions. The LNA has been designed as common source amplifier which amplifies the antenna

power adding as little noise as possible to the received signal. LNA designing needs to put several aspects into

consideration, such as high gain, low noise figure, good input and output matching, stability and linearity. These

factors are not independent from each other, and the unconditional stability often need to sacrifice part of the

gain as compensation, and high linearity usually require high-current, and minimum noise figure is obtained at a

lower current.

Figure 1: Schematic of LNA circuit

C. Stability analysis

A series feedback inductor at source is introduced to improve the amplifier stability. The feedback inductor

provides several advantages for the low noise amplifier design. Inductive reactance in source can increase the

real part of the transistor’s gate input impedance, which make the optimal noise figure point approach to the

power matching point as well as increasing the circuit stability and reducing the gain of the LNA, therefore, we

should consider both of the two factors in circuit designing. Only if the transistor is unconditionally stable, we

can do the matching network design.

D. Matching network

The match network design is divided into power matching and noise matching. These two kinds of match can be

obtained simultaneously by adding an appropriate negative feedback circuit. So regulating the series feedback

inductor and load impedance, the convergence of input impedance and optimum noise match impedance can be

getting into a good compromise.

5. SIMULATION RESULTS

The whole circuit is simulated under the software ADS environment. S parameter, noise figure and high

harmonics and stability of the circuit covering the frequency from 1GHz to 5GHz have been simulated. The

simulation results obtained from 1.8V of voltage supply. The S-parameter is shown in Figure 3, Figure 4, Figure

5 and Figure 6.The forward gain S21 is measured to be 14.4dB at the frequency of 3.76GHz. At the same time,

the reverse isolation (S12) is lower than -45.23dB. Figure 5 and Figure 6 shows that input reflection coefficient

(S11) and the output reflection coefficient (S22) are -12.59dB, -0.15dB, respectively at the frequency of

3.76GHz. The noise figure plotted in Figure 7 is about 0.41dB at 3.76GHz. From the simulating results of the

circuit, it can be seen that a good tradeoff between power matching of the two ports and noise matching was

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taken. The reverse isolation S12 is superior, thus, the power gain has satisfied the requirement of the LNA

performance. LNA circuit simulation has been shown below with results.

TABLE 1: CIRCUIT SIMULATION RESULTS

LNA parameters Simulation results

Supply voltage 1.8 V

S₁₁ -12.59 dB

S₁₂ -45.23 dB

S₂₁ 14.4 dB

S₂₂ -0.15 dB

Noise figure 0.41 dB

Figure 2: Noise figure of LNA Figure 3: Gain (S₂₁)

Figure 4: Reverse isolation (S₁₂) Figure 5: Input reflection coefficient S₁₁

Figure 6: Output reflection coefficients S₂₂

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CONCLUSION

The amplifier is demonstrated with excellent gain, noise figure, and input/output return loss. The simulation

results show that the integrated circuit can meet the requirements of LNA. Complete LNA schematic is

simulated in Agilent’s ADS through 0.18μm CMOS technology generates 14.4 dB voltage gain (S21), 0.41dB

noise figure (NF), -12.59 dB impedance matching (S11) at 3.7GHz frequency with voltage supply of 1.8V.

ACKNOLEDGEMENT

I would like to thank to Dr. Preeti Bajaj, Director G. H. Raisoni College of Engineering, and Nagpur for moral

encouragement and providing necessary facilities. She worked and provides the strengthening the RF circuit

background and provided a lot of support and guidance to the problems that I faced while designing this

complicated circuit. Lastly I would like to thank my parents, my friends, and all the people who directly or

indirectly helped me in my project work.

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