A Low Noise, 13.8μVRMS Low-Dropout Regulator (LDO) Wtihout Error Amplifier

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International Journal of Automation and Control Engineering Volume 2 Issue 4, November 2013 www.seipub.org/ijace 197 A Low Noise, 13.8μVRMS Low-Dropout Regulator (LDO) Without Error Amplifier Yong Hu*, Xiaohong Peng, Ligang Hou, Jinhui Wang, Yunkang Liu VLSI & System Laboratory, Beijing University of Technology, Beijing 100124, China * [email protected] Abstract This paper presents a low-noise and low-dropout regulator(LDO). By applying a unique technology, which doesn’t use error amplifier in the proposed LDO and a variety of means of reducing noise, low-noise as low as 13.8 μVRMS can be achieved. Simulated in bipolar process, the implemented LDO prototype exhibits a good performance. Selecting the appropriate load capacitance, when LDO properly functions in operating Voltage of 0V~10V, its output voltage is 3.3 V with a temperature range of - 55°C~125°C. Keywords Low-Dropout Regulator; Low Noise; Error Amplifier; Feedforward Capacitor Introduction With the rapid development of electronic information technology, consumer electronic products have become an indispensable part of daily lives. As integrated circuits (IC) technology size is constantly narrow, its integration constantly increased, electronic equipment powered voltage reduced, and these portable equipments on power of requirements increasingly demanding, requires the power management chip into the power supply and electronic equipment, which can provide a stable voltage. LDO as an essential analog component, has simple structure, low noise, power, small package and less perimeter application devices, and other advantages which are widely used in portable electronics as power management chip. Therefore, this paper used a variety of noise reduction approaches while not the error amplifier in overall circuit, to design a low noise LDO. Traditional LDO In traditional LDO, overall circuit typically includes bandgap reference, error amplifier, power level circuit and auxiliary circuits. These core modules constitute a feedback loop, as shown in Figure 1. GND PL AC EA BGR VIN( VDD) VOUT FIG. 1 TRADITIONAL LDO TOPOLOGY When traditional LDO works properly, the whole circuit forms a feedback loop, which can stable output voltage, as shown in Figure 2. VIN Vb GND VREF VOUT R2 R1 FIG. 2 POWER STAGE And the output voltage is: ( ) 1 2 1 OUT REF V R R V = + (1) But the traditional LDO uses error amplifier, also the system will be various defects: First of all, using the error amplifier will increase the power dissipation of the circuit, while also increasing chip area. Secondly, inherent offset voltage of the error amplifier will affect the entire power management systems, especially for temperature drift characteristics of the LDO, which directly affects the output voltage. Finally, the circuit uses the error amplifier, and complexity of the circuit will be increased. In stability aspects, it is difficult to control,and the circuit must use excellent compensation programme. Circuit Design In the overall circuit, as shown in Figure 3, the paper has

description

http://www.seipub.org/ijace/paperInfo.aspx?ID=13194 This paper presents a low-noise and low-dropout regulator(LDO). By applying a unique technology, which doesn’t use error amplifier in the proposed LDO and a variety of means of reducing noise, low-noise as low as 13.8 μVRMS can be achieved. Simulated in bipolar process, the implemented LDO prototype exhibits a good performance. Selecting the appropriate load capacitance, when LDO properly functions in operating Voltage of 0V~10V, its output voltage is 3.3 V with a temperature range of -55℃~125℃.

Transcript of A Low Noise, 13.8μVRMS Low-Dropout Regulator (LDO) Wtihout Error Amplifier

Page 1: A Low Noise, 13.8μVRMS Low-Dropout Regulator (LDO) Wtihout Error Amplifier

International Journal of Automation and Control Engineering Volume 2 Issue 4, November 2013 www.seipub.org/ijace

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A Low Noise, 13.8μVRMS Low-Dropout Regulator (LDO) Without Error Amplifier Yong Hu*, Xiaohong Peng, Ligang Hou, Jinhui Wang, Yunkang Liu

VLSI & System Laboratory, Beijing University of Technology, Beijing 100124, China *[email protected] Abstract

This paper presents a low-noise and low-dropout regulator(LDO). By applying a unique technology, which doesn’t use error amplifier in the proposed LDO and a variety of means of reducing noise, low-noise as low as 13.8 μVRMS can be achieved. Simulated in bipolar process, the implemented LDO prototype exhibits a good performance. Selecting the appropriate load capacitance, when LDO properly functions in operating Voltage of 0V~10V, its output voltage is 3.3 V with a temperature range of -55°C~125°C.

Keywords

Low-Dropout Regulator; Low Noise; Error Amplifier; Feedforward Capacitor

Introduction

With the rapid development of electronic information technology, consumer electronic products have become an indispensable part of daily lives. As integrated circuits (IC) technology size is constantly narrow, its integration constantly increased, electronic equipment powered voltage reduced, and these portable equipments on power of requirements increasingly demanding, requires the power management chip into the power supply and electronic equipment, which can provide a stable voltage. LDO as an essential analog component, has simple structure, low noise, power, small package and less perimeter application devices, and other advantages which are widely used in portable electronics as power management chip.

Therefore, this paper used a variety of noise reduction approaches while not the error amplifier in overall circuit, to design a low noise LDO.

Traditional LDO

In traditional LDO, overall circuit typically includes bandgap reference, error amplifier, power level circuit and auxiliary circuits. These core modules constitute a feedback loop, as shown in Figure 1.

GND

PL

AC

EA

BGR

VIN( VDD)

VOUT

FIG. 1 TRADITIONAL LDO TOPOLOGY

When traditional LDO works properly, the whole circuit forms a feedback loop, which can stable output voltage, as shown in Figure 2.

VIN

Vb

GND

VREF

VOUT

R2

R1

FIG. 2 POWER STAGE

And the output voltage is:

( )1 21OUT REFV R R V= + ∗ (1) But the traditional LDO uses error amplifier, also the system will be various defects:

First of all, using the error amplifier will increase the power dissipation of the circuit, while also increasing chip area.

Secondly, inherent offset voltage of the error amplifier will affect the entire power management systems, especially for temperature drift characteristics of the LDO, which directly affects the output voltage.

Finally, the circuit uses the error amplifier, and complexity of the circuit will be increased. In stability aspects, it is difficult to control,and the circuit must use excellent compensation programme.

Circuit Design

In the overall circuit, as shown in Figure 3, the paper has

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V(IN) V(OUT)

GNDPLACBGPBC

QP1

QN4

QN3QN2

QN1

QN6QN5

QN7

QPPOWER

QP13

QP12

QP8QP7

QP11

QP5QP4 QP6

QP10

QP3

QP2

R3R2R1

RD1

R13

CFF

R12R10R9R8

RFF

R7R6R5R4

RD2R11

FIG. 3 OVERALL CIRCUIT

designed the LDO including bias circuit, bandgap reference, start-up circuit, auxiliary circuit (over-temperature protection, over-current protection), power level circuit.

Schematic

The output voltage of the overall circuit, such as the expression (1), REFV is the reference voltage of the bandgap reference , the base voltage of 7QN . Let the collector current of 7QN be REFI , the collector current

of 2QN be 2QNI , the collector current of 3QN be 3QNI .

2QNI and 3QNI are provided by the bias circuit. We can get the expression:

( ) ( ) ( )3322 109 QNbeQNQNbeQNREF VRIVRII +∗=+∗+ (2) After calculation,

( ) ( )2

3

9

1023QN

QNQNbeQNbeREF I

RRIVV

I −∗+−

= (3)

Therefore, it can be:

( ) ( )72 9913 QNbeQNREFREF VRIRRIV +∗++∗= (4) The expression (1) into expression (2), we get:

( )( )

9

13910

9

13937

lnR

RRRIR

RRNVVV QNTQNbeREF+∗

∗++

∗∗+=132

RIQN ∗− (5) In the expression (5), selecting suitable magnitude of

9R , 10R and 13R to make the sum of the third algebraic and the fourth algebraic is zero:

( )13

9

1391023

RIR

RRRI QNQN ∗=+∗

∗ (6)

Finally, we can get REFV which is a temperature independent reference voltage:

( )9

139ln7 R

RRNVVV TQNbeREF+

∗∗+= (7)

In the expression (7), the ratio of and base-emitter

junction area is N. Since this is designed bandgap reference, error amplifier is not used, without considering its impact on the reference voltage. Ignoring op-amp offset voltage VOS, the output voltage is expression (7).

At room temperature: KT °= 300 , 5.1−≈∂∂ TVBE KVTVKV T

m087.0,m +≈∂∂ , by selecting appropriate values of 139 , RR and N, a temperature-independent reference voltage can be obtained.

Noise Reduction

In traditional LDO, the output voltage of the noise source can be obtained as expression (8),

( ) ( ) ( ) ( )REFnoisePOWERnoiseAMPnoiseOUTnoise VVVV ++= (8)

The total noise of the output voltage is ( )OUTnoiseV , and

the error amplifier noise is ( )AMPnoiseV . The power level

produces the noise which is ( )POWERnoiseV . The noise of

the bandgap reference is ( )REFnoiseV . To achieve the purpose of noise reduction, respectively, the noise is reduced or elimilated which is represented by the right of expression (8). Therefore, this paper proposed three measures on noise reduction.

Since the error amplifier is used, the overall circuit brings many defects. In circuit, the offset voltage exists, which will definitely increase the total output noise. Eliminating the offset voltage effects tends to increase the size of the circuit structure. Therefore, this paper does not use the error amplifier, to eliminate directly the first noise part in the total output noise.

The power level circuit, FFR and FFC are used as the form of the feedforward filter, whose function is to bypass the signal around the voltage divider output noise directly to the output it's the, as well whose

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ability of noise reduction is determined by attenuation function:

( ) ( ) 11

1<

+=

pR C ff

fG (9)

21

F FF Fp CR

f∗∗

=π (10)

The noise of power level is reduced to

( ) ( ) ( )R E Fn o i s eR CR E Fn o i s e VfGV ∗=′ (11) In the negative feedback loop of the overall circuit, bandgap reference provides reference voltage for the power level circuit. The effect of the noise of bandgap reference will be expanded and added to the total output noise. Therefore, if the noise of bandgap reference can be reduced, it will inevitably reduce the total output noise. The simulation results show that, in

bandgap reference, the collector shot noise of 3QP has the largest proportion of the total noise. Therefore, increasing a grounded collector PNP in feedback

loopcan discharge collector current of 3QP . In this

way, the noise of 3QP can be significantly reduced.

In summary, based on the above three measures, a good performance LDO has been obtained with low output noise.

Experiment Result

By spectre simulation, power spectral density curve is shown as Figure 4, in which the power spectral density is HzV10540 15- µ× at 10Hz. Beginning from 2 Hz, the power spectral density is basically stable at

around z1067.9 16- HVµ× . After calculation, output noise is 13.8 μVRMS from 10 Hz to 100 kHz.

FIG. 4 OUTPUT NOISE SPECTRAL DENSITY

Figure 5, 6 and 7 show the corresponding relationship between the output voltage and some parameters. When input voltage is 3.7 V, output voltage rises from 0 V to 3.3 V. In the temperature range of -55 to 125oC, the temperature drift of LDO is 47 mV. As shown in TABLE 1, We can see the relevant performance

indicators of the circuit.

FIG. 5 OUTPUT VOLTAGE VS INPUT VOLTAGE

FIG. 6 OUTPUT VOLTAGE VS TEMPERATURE

FIG. 7 OUTPUT VOLTAGE VS LOAD CURRENT

TABLE 1 PERFORMANCE SUMMARY

Experiment Result Parameter Value

Technology bipolar VDD 0~10V VOUT 3.3V

Temperature -55~125℃ Dropout 0.53V@300mA,125 ℃

ILOAD 300mA IQUIESCENT 35.2μA

Noise 13.8μVRMS

Summary

In this paper, bipolar process was utilized to design a low noise, dropout regulator. And a variety of noise reduction ways were presented to achieve low noise

RMSV8.13 µ . The operating voltage range of proposed is

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0~10 V. The output voltage of LDO can be stabilized at 3.3 V. In the normal operation, the ambient temperature range is -55 ~ 125 degrees.

ACKNOWLEDGMENTS

This work was supported by the National Natural Science Foundations of China (No.60976028 and No.61204040), Beijing Municipal Natural Science Foundation (No.4123092), Ph.D. Programs Foundation of Ministry of Education of China (No. 20121103120018), Beijing Municipal Education Commission surface science and technology plan project (JC002999201301).

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462-465. Xiaohong Peng received the M.S. degree in electronic engineering from the Beijing University of Aeronautics and Astronautics, Beijing, China, in 1985, and the Ph.D. degree in electrical engineering from the katholieke University Leuven, Belgium, in 2004. He was a Lecturer and

Associate Professor with the Electronic Center, Beijing university of Aeronautics and Astronautics, Beijing, China, from 1985 to 1998. During the period 1999–2004, he was an Assistant Researcher with the ESAT-MICAS Laboratories, Katholieke University Leuven, Belgium. Currently, he is an associate Professor with the VLSI and System Laboratory, Electronic Engineering Department, Beijing University of Technology, Beijing, China.

Yong Hu is m.s. graduate student with the VLSI and System Laboratory, Electronic Engineering Department, Beijing University of Technology, Beijing, China. He is majoring in Integrate Circuits.