80mW, DirectDrive Stereo Headphone Driver with Shutdownsmartpuls.ru/other/leory/max4410.pdf±8kV...

General DescriptionThe MAX4410 stereo headphone driver is designed forportable equipment where board space is at a premium. The MAX4410 uses a unique DirectDrivearchitecture to produce a ground-referenced outputfrom a single supply, eliminating the need for large DC-blocking capacitors, saving cost, board space, andcomponent height.

The MAX4410 delivers up to 80mW per channel into a16Ω load and has low 0.003% THD + N. A high power-supply rejection ratio (90dB at 1kHz) allows this device tooperate from noisy digital supplies without an additionallinear regulator. The MAX4410 includes ±8kV ESD pro-tection on the headphone outputs. Comprehensive click-and-pop circuitry suppresses audible clicks and pops onstartup and shutdown. Independent left/right, low-powershutdown controls make it possible to optimize powersavings in mixed mode, mono/stereo applications.

The MAX4410 operates from a single 1.8V to 3.6V supply,consumes only 7mA of supply current, has short-circuitand thermal overload protection, and is specified over theextended -40°C to +85°C temperature range. TheMAX4410 is available in a tiny (2mm x 2mm x 0.6mm),16-bump chip-scale package (UCSP™) and a 14-pinTSSOP package.

Applications

Features♦ No Bulky DC-Blocking Capacitors Required♦ Ground-Referenced Outputs Eliminate DC-Bias

Voltages on Headphone Ground Pin♦ No Degradation of Low-Frequency Response Due

to Output Capacitors♦ 80mW Per Channel into 16Ω♦ Low 0.003% THD + N♦ High PSRR (90dB at 1kHz)♦ Integrated Click-and-Pop Suppression♦ 1.8V to 3.6V Single-Supply Operation♦ Low Quiescent Current♦ Independent Left/Right, Low-Power

Shutdown Controls♦ Short-Circuit and Thermal Overload Protection♦ ±8kV ESD-Protected Amplifier Outputs♦ Available in Space-Saving Packages

16-Bump UCSP (2mm x 2mm x 0.6mm)14-Pin TSSOP

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80mW, DirectDrive Stereo Headphone Driverwith Shutdown

________________________________________________________________ Maxim Integrated Products 1

LEFTAUDIOINPUT

RIGHTAUDIOINPUT

SHDNL

SHDNR

MAX4410

Functional Diagram

Ordering Information

19-2386; Rev 2; 10/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

PART TEMP RANGEPIN/BUMP-PACKAGE

MAX4410EBE-T* -40°C to +85°C 16 UCSP-16MAX4410EUD -40°C to +85°C 14 TSSOP

NotebooksCellular PhonesPDAs

MP3 PlayersWeb PadsPortable Audio Equipment *Future product—contact factory for availability.

UCSP is a trademark of Maxim Integrated Products, Inc. Pin Configurations and Typical Application Circuit appearat end of data sheet.

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2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS(PVDD = SVDD = 3V, PGND = SGND = 0, SHDNL = SHDNR = SVDD, C1 = C2 = 2.2µF, RIN = RF = 10kΩ, RL = ∞, TA = TMIN to TMAX,unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.

PGND to SGND .....................................................-0.3V to +0.3VPVDD to SVDD .................................................................-0.3V to +0.3VPVSS to SVSS .........................................................-0.3V to +0.3VPVDD and SVDD to PGND or SGND .........................-0.3V to +4VPVSS and SVSS to PGND or SGND ..........................-4V to +0.3VIN_ to SGND..........................................................-0.3V to +0.3VSHDN_ to SGND........................(SGND - 0.3V) to (SVDD + 0.3V)OUT_ to SGND ............................(SVSS - 0.3V) to (SVDD + 0.3V)C1P to PGND.............................(PGND - 0.3V) to (PVDD + 0.3V)C1N to PGND .............................(PVSS - 0.3V) to (PGND + 0.3V)Output Short Circuit to GND or VDD...........................Continuous

Continuous Power Dissipation (TA = +70°C)14-Pin TSSOP (derate 9.1mW/°C above +70°C) ..........727mW16-Bump UCSP (derate 15.2mW/°C above +70°C)....1212mW

Junction Temperature ......................................................+150°COperating Temperature Range ...........................-40°C to +85°CStorage Temperature Range .............................-65°C to +150°CBump Temperature (soldering) (Note 1)

Infrared (15s) ...............................................................+220°CVapor Phase (60s) .......................................................+215°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Supply Voltage Range VDD Guaranteed by PSRR test 1.8 3.6 V

One channel enabled 4Quiescent Supply Current IDD

Two channels enabled 7 11.5mA

Shutdown Supply Current I SHDN SHDNL = SHDNR = GND 6 10 µA

VIH0.7 xSVDD

SHDN_ Thresholds

VIL0.3 xSVDD

V

SHDN_ Input Leakage Current -1 +1 µA

SHDN_ to Full Operation tSON 175 µs

CHARGE PUMP

Oscillator Frequency fOSC 272 320 368 kHz

AMPLIFIERS

Input Offset Voltage VOS Input AC-coupled, RL = 32Ω 0.5 2.4 mV

Input Bias Current IBIAS -100 +100 nA

1.8V ≤ VDD ≤ 3.6V DC 75 90

fRIPPLE = 1kHz 90Power-Supply Rejection Ratio PSRR200mVP-P ripple

fRIPPLE = 20kHz 55

dB

RL = 32Ω 65Output Power POUT THD + N = 1%

RL = 16Ω 40 80mW

Note 1: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the devicecan be exposed to during board-level solder attach and rework. This limit permits only the use of the solder profiles recom-mended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow.Preheating is required. Hand or wave soldering is not allowed.


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_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)(PVDD = SVDD = 3V, PGND = SGND = 0, SHDNL = SHDNR = SVDD, C1 = C2 = 2.2µF, RIN = RF = 10kΩ, RL = ∞, TA = TMIN to TMAX,unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)

Note 2: All specifications are 100% tested at TA = +25°C; temperature limits are guaranteed by design.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

RL = 32Ω,POUT = 25mW

0.003Total Harmonic Distortion PlusNoise

THD + N fIN = 1kHzRL = 16Ω,POUT = 50mW

0.003

%

Signal-to-Noise Ratio SNR RL = 32Ω, POUT = 20mW, fIN = 1kHz 95 dB

Slew Rate SR 0.8 V/µs

Maximum Capacitive Load CL No sustained oscillations 300 pF

Crosstalk RL = 16Ω, POUT = 1.6mW, fIN = 10kHz 70 dB

Thermal Shutdown Threshold 140 °C

Thermal Shutdown Hysteresis 15 °C

ESD Protection Human body model (OUTR, OUTL) ±8 kV

Typical Operating Characteristics(C1 = C2 = 2.2µF, THD + N measurement bandwidth = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)

10 100 10k1k 100k

TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY

MAX4410 toc01

FREQUENCY (Hz)

THD

+ N

(%)

1

0.1

0.001

0.01

VDD = 3VAV = -1V/VRL = 16Ω

POUT = 10mW

POUT = 25mW

POUT = 50mW


MAX4410 toc02

THD

+ N

(%)

1

0.1

0.001

0.01


POUT = 25mW

POUT = 10mW

POUT = 50mW

10 100 10k1k 100kFREQUENCY (Hz)

1

0.0001

TOTAL HARMONIC DISTORTION PLUSNOISE vs. FREQUENCY

0.001

0.01

0.1

MAX

4410

toc0

3


POUT = 5mW

POUT = 10mW

POUT = 25mW

THD

+ N

(%)



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4 _______________________________________________________________________________________

Typical Operating Characteristics (continued)(C1 = C2 = 2.2µF, THD + N measurement bandwidth = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)

1


0.001

0.01

0.1

MAX

4410

toc0

4

THD

+ N

(%)


POUT = 5mW

POUT = 10mW

POUT = 25mW



MAX4410 toc05

THD

+ N

(%)

1

0.1

0.001

0.01

VDD = 1.8VAV = -1V/VRL = 16Ω

POUT = 10mW

POUT = 20mW

POUT = 5mW



MAX4410 toc06

THD

+ N

(%)

1

0.1

0.001

0.01

VDD = 1.8VAV = -2V/VRL = 16Ω

POUT = 10mW

POUT = 5mW

POUT = 20mW


1


0.001

0.01

0.1

MAX

4410

toc0

7

VDD = 1.8VAV = -1V/VRL = 32Ω

POUT = 20mW

THD

+ N

(%)

POUT = 10mW

POUT = 5mW


1


0.001

0.01

0.1

MAX

4410

toc0

8

VDD = 1.8VAV = -2V/VRL = 32Ω

POUT = 5mW

POUT = 20mW

THD

+ N

(%)

POUT = 10mW


100

10

1

0.1

0.01

0.0010 100 15050 200

TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER

MAX

4410

toc0

9

OUTPUT POWER (mW)

VDD = 3VAV = -1V/VRL = 16ΩfIN = 20Hz

THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL

OUTPUTS180° OUT OFPHASE

100

10

1

0.1

0.01

0.0010 100 15050 200


MAX

4410

toc1

0

OUTPUT POWER (mW)

VDD = 3VAV = -1V/VRL = 16ΩfIN = 1kHz

THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 100 15050 200


MAX

4410

toc1

1

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 100 15050 200


MAX

4410

toc1

2

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL



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_______________________________________________________________________________________ 5

100

10

1

0.1

0.01

0.0010 100 15050 200


MAX

4410

toc1

3

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 100 15050 200


MAX

4410

toc1

4

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.001

0.00010 50 7525 125100


MAX

4410

toc1

5

OUTPUT POWER (mW)

THD

+ N

(%)


OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 50 1007525 125


MAX

4410

toc1

6

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 50 1007525 125


MAX

4410

toc1

7

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 50 1007525 125


MAX

4410

toc1

8

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 50 1007525 125


MAX

4410

toc1

9

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 50 1007525 125


MAX

4410

toc2

0

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010 60


MAX

4410

toc2

1

OUTPUT POWER (mW)

VDD = 1.8VAV = -1V/VRL = 16ΩfIN = 20Hz

THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL




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6 _______________________________________________________________________________________


100

10

1

0.1

0.01

0.0010 20 40 503010 60


MAX

4410

toc2

2

OUTPUT POWER (mW)

VDD = 1.8VAV = -1V/VRL = 16ΩfIN = 1kHz

THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010 60


MAX

4410

toc2

3

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010 60


MAX

4410

toc2

4

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010 60


MAX

4410

toc2

5

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010 60


MAX

4410

toc2

6

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010


MAX

4410

toc2

7

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010


MAX

4410

toc2

8

OUTPUT POWER (mW)


THD

+ N

(%) OUTPUTS IN

PHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010


MAX

4410

toc2

9

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010


MAX

4410

toc3

0

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL



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_______________________________________________________________________________________ 7

100

10

1

0.1

0.01

0.0010 20 40 503010


MAX

4410

toc3

1

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


100

10

1

0.1

0.01

0.0010 20 40 503010


MAX

4410

toc3

2

OUTPUT POWER (mW)


THD

+ N

(%) OUTPUTS IN

PHASE

ONECHANNEL


0.01 0.1 101 100

POWER-SUPPLY REJECTION RATIO vs. FREQUENCY

MAX

4410

toc3

3

FREQUENCY (kHz)

PSRR

(dB)

0

-40

-20

-100

-80

-60

VDD = 3VRL = 16Ω

0.01 0.1 101 100


MAX

4410

toc3

4

FREQUENCY (kHz)

PSRR

(dB)

0

-40

-20

-100

-80

-60

VDD = 1.8VRL = 16Ω

0.01 0.1 101 100


MAX

4410

toc3

5

FREQUENCY (kHz)

PSRR

(dB)

0

-40

-20

-100

-80

-60

VDD = 3VRL = 32Ω

0.01 0.1 101 100


MAX

4410

toc3

6

FREQUENCY (kHz)

PSRR

(dB)

0

-40

-20

-100

-80

-60

VDD = 1.8VRL = 32Ω

CROSSTALK vs. FREQUENCY

MAX

4410

toc3

7

FREQUENCY (Hz)

CROS

STAL

K (d

B)

1010.1

-80

-60

-40

-20

0

-1000.01 100

VDD = 3VPOUT = 1.6mWRL = 16Ω

LEFT TO RIGHT

RIGHT TO LEFT

OUTPUT POWER vs. SUPPLY VOLTAGE

MAX

4410

toc3

8

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(mW

)

3.33.02.72.42.1

20

40

60

80

100

120

140

160

180

200

01.8 3.6

fIN = 1kHzRL = 16ΩTHD + N = 1%

INPUTSIN PHASE

INPUTS 180°OUT OF PHASE

OUTPUT POWER vs. SUPPLY VOLTAGEM

AX44

10 to

c39

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(mW

)

3.33.02.72.42.1

50

100

150

200

250

300

01.8 3.6


INPUTSIN PHASE




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OUTPUT POWER vs. SUPPLY VOLTAGEM

AX44

10 to

c40

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(mW

)

3.33.02.72.42.1

20

40

60

80

100

120

140

01.8 3.6

fIN = 1kHzRL = 32ΩTHD + N = 1% INPUTS 180°

OUT OF PHASE

INPUTSIN PHASE

OUTPUT POWER vs. SUPPLY VOLTAGE

MAX

4410

toc4

1

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(mW

)

3.33.02.72.42.1

40

20

60

80

100

120

140

160

180

01.8 3.6


INPUTSIN PHASE


OUTPUT POWER vs. LOAD RESISTANCE

MAX

4410

toc4

2

LOAD RESISTANCE (Ω)

OUTP

UT P

OWER

(mW

)

10k1k100

40

20

60

80

100

120

140

160

010 100k

VDD = 3VfIN = 1kHz

THD + N = 1%


INPUTSIN PHASE


MAX

4410

toc4

3


OUTP

UT P

OWER

(mW

)

10k1k100

50

100

150

200

250

010 100k

INPUTSIN PHASE


VDD = 3VfIN = 1kHz

THD + N = 10%

OUTPUT POWER vs. LOAD RESISTANCEM

AX44

10 to

c44


OUTP

UT P

OWER

(mW

)

10k1k100

5

10

15

20

25

30

35

40

45

010 100k


INPUTS INPHASE

VDD = 1.8VfIN = 1kHz

THD + N = 1%


MAX

4410

toc4

5


OUTP

UT P

OWER

(mW

)

10k1k100

10

20

30

40

50

60

70

010 100k


INPUTS INPHASE

VDD = 1.8VfIN = 1kHz

THD + N = 10%

POWER DISSIPATIONvs. OUTPUT POWER

MAX

4410

toc4

6

OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON (m

W)

16012040 80

50

100

150

200

250

300

350

400

00 200


fIN = 1kHzRL = 16ΩVDD = 3VPOUT = POUTL + POUTR

INPUTSIN PHASE


MAX

4410

toc4

7

OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON (m

W)

16012040 80

20

40

60

80

120

100

140

160

180

00 200


fIN = 1kHzRL = 32ΩVDD = 3VPOUT = POUTL + POUTR

INPUTSIN PHASE


MAX

4410

toc4

8

OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON (m

W)

50403010 20

20

40

60

80

100

120

140

00 60


fIN = 1kHzRL = 16ΩVDD = 1.8VPOUT = POUTL + POUTR

INPUTSIN PHASE


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_______________________________________________________________________________________ 9


MAX

4410

toc4

9

OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON (m

W)

50403010 20

10

20

30

40

50

60

70

00 60


fIN = 1kHzRL = 32ΩVDD = 1.8VPOUT = POUTL + POUTR

INPUTSIN PHASE

806040

100 10k 100k 1M 10M

200

-20-40-60-80

-100

-180

-120-140-160

GAIN AND PHASE vs. FREQUENCY

MAX

4410

toc5

0

FREQUENCY (Hz)

GAIN

/PHA

SE (d

B/DE

GREE

S)

VDD = 3VAV = 1000V/VRL = 16Ω

1k

GAIN

PHASE

10

10 1k 10k 1M100k 10M

0

-10

-20

-30

-50

-40

GAIN FLATNESS vs. FREQUENCY

MAX

4410

toc5

1

FREQUENCY (Hz)

GAIN

(dB)


100

CHARGE-PUMP OUTPUT RESISTANCEvs. SUPPLY VOLTAGE

MAX

4410

toc5

2

SUPPLY VOLTAGE (V)

OUTP

UT R

ESIS

TANC

E (Ω

)

3.33.02.72.42.1

2

4

6

8

10

01.8 3.6

VIN_ = GNDIPVSS = 10mANO LOAD

OUTPUT POWER vs. CHARGE-PUMP CAPACITANCE AND LOAD RESISTANCE

MAX

4410

toc5

3


OUTP

UT P

OWER

(mW

)

403020

20

10

30

40

50

60

70

80

90

010 50

fIN = 1kHzTHD + N = 1%

INPUTS IN PHASE

C1 = C2 = 1µF

C1 = C2 = 0.47µF

C1 = C2 = 0.68µF

C1 = C2 = 2.2µF


FREQUENCY (kHz)1010.1 100

OUTPUT SPECTRUM vs. FREQUENCY

MAX

4410

toc5

4

OUTP

UT S

PECT

RUM

(dB)

-100

-80

-60

-40

-20

0

-120

VIN = 1VP-PfIN = 1kHzRL = 32ΩAV = -1V/V


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10 ______________________________________________________________________________________


SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX

4410

toc5

5

SUPPLY VOLTAGE (V)

SUPP

LY C

URRE

NT (m

A)

2.71.80.9

2

4

6

8

10

00 3.6

SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX

4410

toc5

6

SUPPLY VOLTAGE (V)SU

PPLY

CUR

RENT

(µA)

2.71.80.9

2

4

6

8

10

00 3.6

SHDNL = SHDNR = GND

EXITING SHUTDOWNMAX4410 toc57

OUTR

SHDNR

2V/div

500mV/div

200µs/divfIN = 1kHzRL = 32ΩSHDNL = GND

POWER-UP/DOWN WAVEFORMMAX4410 toc58

OUT_

OUT_FFT

VDD

3V

20dB/div

10mV/div

0V

200ms/divFFT: 25Hz/div

RL = 32ΩVIN_ = GND

-100dB


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______________________________________________________________________________________ 11

Pin Description

PIN BUMP

TSSOP UCSPNAME FUNCTION

1 B2 SHDNL Active-Low, Left-Channel Shutdown. Connect to VDD for normal operation.

2 A3 PVDDCharge-Pump Power Supply. Powers charge-pump inverter, charge-pump logic, andoscillator.

3 A4 C1P Flying Capacitor Positive Terminal

4 B4 PGND Power Ground. Connect to SGND.

5 C4 C1N Flying Capacitor Negative Terminal

6 D4 PVSS Charge-Pump Output

7 D3 SVSS Amplifier Negative Power Supply. Connect to PVSS.

8 D2 OUTL Left-Channel Output

9 D1 SVDD Amplifier Positive Power Supply. Connect to PVDD.

10 C1 INL Left-Channel Audio Input

11 C2 OUTR Right-Channel Output

12 B1 SHDNR Active-Low, Right-Channel Shutdown. Connect to VDD for normal operation.

13 A1 INR Right-Channel Audio Input

14 A2 SGND Signal Ground. Connect to PGND.


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12 ______________________________________________________________________________________

Detailed DescriptionThe MAX4410 stereo headphone driver features Maxim’sDirectDrive architecture, eliminating the large output-coupling capacitors required by traditional single-supplyheadphone drivers. The device consists of two 80mWClass AB headphone drivers, undervoltage lockout(UVLO)/shutdown control, charge-pump, and compre-hensive click-and-pop suppression circuitry (see TypicalApplication Circuit). The charge pump inverts the posi-tive supply (PVDD), creating a negative supply (PVSS).The headphone drivers operate from these bipolar sup-plies with their outputs biased about GND (Figure 1). Thedrivers have almost twice the supply range compared toother 3V single-supply drivers, increasing the availableoutput power. The benefit of this GND bias is that the dri-ver outputs do not have a DC component typicallyVDD/2. Thus, the large DC-blocking capacitors areunnecessary, improving frequency response while con-serving board space and system cost.

Each channel has independent left/right, active-lowshutdown controls, making it possible to optimizepower savings in mixed-mode, mono/stereo operation.The device features an undervoltage lockout that pre-vents operation from an insufficient power supply andclick-and-pop suppression that eliminates audible tran-sients on startup and shutdown. Additionally, theMAX4410 features thermal overload and short-circuitprotection and can withstand ±8kV ESD strikes on theoutput pins.

DirectDriveTraditional single-supply headphone drivers have theiroutputs biased about a nominal DC voltage (typicallyhalf the supply) for maximum dynamic range. Largecoupling capacitors are needed to block this DC biasfrom the headphone. Without these capacitors, a signif-icant amount of DC current flows to the headphone,resulting in unnecessary power dissipation and possi-ble damage to both headphone and headphone driver.

Maxim’s DirectDrive architecture uses a charge pumpto create an internal negative supply voltage. Thisallows the outputs of the MAX4410 to be biased aboutGND, almost doubling dynamic range while operatingfrom a single supply. With no DC component, there isno need for the large DC-blocking capacitors. Insteadof two large (220µF, typ) tantalum capacitors, theMAX4410 charge pump requires two small ceramiccapacitors, conserving board space, reducing cost,and improving the frequency response of the head-phone driver. See the Output Power vs. Charge-PumpCapacitance and Load Resistance graph in the TypicalOperating Characteristics for details of the possible

capacitor sizes. There is a low DC voltage on the driveroutputs due to amplifier offset. However, the offset ofthe MAX4410 is typically 0.5mV, which, when com-bined with a 32Ω load, results in less than 16µA of DCcurrent flow to the headphones.

Previous attempts to eliminate the output-coupling capac-itors involved biasing the headphone return (sleeve) tothe DC-bias voltage of the headphone amplifiers. Thismethod raises some issues:

1) When combining a microphone and headphone ona single connector, the microphone bias schemetypically requires a 0V reference.

2) The sleeve is typically grounded to the chassis.Using this biasing approach, the sleeve must beisolated from system ground, complicating productdesign.

3) During an ESD strike, the driver’s ESD structuresare the only path to system ground. Thus, the drivermust be able to withstand the full ESD strike.

VDD/2

VDD

GND

+VDD

-VDD

GNDVOUT

VOUT

CONVENTIONAL DRIVER-BIASING SCHEME

DirectDrive BIASING SCHEME

Figure 1. Traditional Driver Output Waveform vs. MAX4410Output Waveform


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______________________________________________________________________________________ 13

4) When using the headphone jack as a line out to otherequipment, the bias voltage on the sleeve may con-flict with the ground potential from other equipment,resulting in possible damage to the drivers.

Low-Frequency ResponseIn addition to the cost and size disadvantages of the DC-blocking capacitors required by conventional head-phone amplifiers, these capacitors limit the amplifier’slow-frequency response and can distort the audio signal.

1) The impedance of the headphone load and the DC-blocking capacitor form a highpass filter with the -3dB point set by:

where RL is the headphone impedance and COUT isthe DC-blocking capacitor value. The highpass filteris required by conventional single-ended, singlepower-supply headphone drivers to block the midrailDC bias component of the audio signal from theheadphones. The drawback to the filter is that it canattenuate low-frequency signals. Larger values ofCOUT reduce this effect but result in physically larg-er, more expensive capacitors. Figure 2 shows therelationship between the size of COUT and the result-ing low-frequency attenuation. Note that the -3dBpoint for a 16Ω headphone with a 100µF blockingcapacitor is 100Hz, well within the normal audioband, resulting in low-frequency attenuation of thereproduced signal.

2) The voltage coefficient of the DC-blocking capacitorcontributes distortion to the reproduced audio signalas the capacitance value varies as a function of thevoltage change across the capacitor. At low fre-quencies, the reactance of the capacitor dominatesat frequencies below the -3dB point and the voltagecoefficient appears as frequency-dependent distor-tion. Figure 3 shows the THD + N introduced by twodifferent capacitor dielectric types. Note that below100Hz, THD + N increases rapidly.

The combination of low-frequency attenuation and fre-quency-dependent distortion compromises audioreproduction in portable audio equipment that empha-sizes low-frequency effects such as multimedia lap-tops, as well as MP3, CD, and DVD players. Byeliminating the DC-blocking capacitors throughDirectDrive technology, these capacitor-related defi-ciencies are eliminated.

Charge PumpThe MAX4410 features a low-noise charge pump. The320kHz switching frequency is well beyond the audiorange, and thus does not interfere with the audio sig-nals. The switch drivers feature a controlled switchingspeed that minimizes noise generated by turn-on andturn-off transients. By limiting the switching speed of theswitches, the di/dt noise caused by the parasitic bondwire and trace inductance is minimized. Although nottypically required, additional high-frequency noise atten-uation can be achieved by increasing the size of C2(see Typical Application Circuit).

fR CdB

L OUT− =3

12π

LF ROLL OFF (16Ω LOAD)

MAX

4410

fig0

2

FREQUENCY (Hz)

ATTE

NUAT

ION

(dB)

100

-30

-25

-20

-10-3dB CORNER FOR100µF IS 100Hz

-15

-5-3

0

-3510 1k

33µF

330µF

220µF

100µF

Figure 2. Low-Frequency Attenuation for Common DC-BlockingCapacitor Values

ADDITIONAL THD + N DUE TO DC-BLOCKING CAPACITORS

MAX

4410

fig0

3

FREQUENCY (Hz)

THD

+ N

(%)

10k1k100

0.001

0.01

0.1

1

10

0.000110 100k

TANTALUM

ALUM/ELEC

Figure 3. Distortion Contributed by DC-Blocking Capacitors


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14 ______________________________________________________________________________________

ShutdownThe MAX4410 features two shutdown controls allowingeither channel to be shut down or muted independently.SHDNL controls the left channel while SHDNR controlsthe right channel. Driving either SHDN_ low disables therespective channel, sets the driver output impedance toabout 1kΩ, and reduces the supply current to less than10µA. When both SHDN_ inputs are driven low, thecharge pump is also disabled, further reducing supplycurrent draw to 6µA. The charge pump is enabled onceeither SHDN_ input is driven high.

Click-and-Pop SuppressionIn traditional single-supply audio drivers, the output-coupling capacitor is a major contributor of audibleclicks and pops. Upon startup, the driver charges thecoupling capacitor to its bias voltage, typically half thesupply. Likewise, on shutdown the capacitor is dis-charged to GND. This results in a DC shift across thecapacitor, which in turn, appears as an audible transientat the speaker. Since the MAX4410 does not requireoutput-coupling capacitors, this does not arise.

Additionally, the MAX4410 features extensive click-and-pop suppression that eliminates any audible transientsources internal to the device. The Power-Up/DownWaveform in the Typical Operating Characteristicsshows that there are minimal spectral components in theaudible range at the output upon startup or shutdown.

In most applications, the output of the preamplifier dri-ving the MAX4410 has a DC bias of typically half thesupply. At startup, the input-coupling capacitor ischarged to the preamplifier’s DC-bias voltage throughthe RF of the MAX4410, resulting in a DC shift acrossthe capacitor and an audible click/pop. Delaying therise of the MAX4410’s SHDN_ signals 4 to 5 time con-stants (200ms to 300ms) based on RIN and CIN relativeto the start of the preamplifier eliminates this click/popcaused by the input filter.

Applications InformationPower Dissipation

Under normal operating conditions, linear power ampli-fiers can dissipate a significant amount of power. Themaximum power dissipation for each package is givenin the Absolute Maximum Ratings section underContinuous Power Dissipation or can be calculated bythe following equation:

where TJ(MAX) is +150°C, TA is the ambient tempera-ture, and θJA is the reciprocal of the derating factor in

°C/W as specified in the Absolute Maximum Ratingssection. For example, θJA of the TSSOP package is+109.9°C/W.

The MAX4410 has two sources of power dissipation,the charge pump and the two drivers. If the power dis-sipation for a given application exceeds the maximumallowed for a given package, either reduce VDD,increase load impedance, decrease the ambient tem-perature, or add heat sinking to the device. Large out-put, supply, and ground traces improve the maximumpower dissipation in the package.

Thermal overload protection limits total power dissipa-tion in the MAX4410. When the junction temperatureexceeds +140°C, the thermal protection circuitry dis-ables the amplifier output stage. The amplifiers areenabled once the junction temperature cools by 15°C.This results in a pulsing output under continuous ther-mal overload conditions.

Output PowerThe device has been specified for the worst-case sce-nario— when both inputs are in phase. Under this con-dition, the drivers simultaneously draw current from thecharge pump, leading to a slight loss in headroom ofVSS. In typical stereo audio applications, the left andright signals have differences in both magnitude andphase, subsequently leading to an increase in the max-imum attainable output power. Figure 4 shows the twoextreme cases for in and out of phase. In reality, theavailable power lies between these extremes.

PT T

DISSPKG MAXJ MAX A

JA( )

( )=−

θ

100

10

1

0.1

0.01

0.0010 100 15050 200


MAX

4410

fig0

4

OUTPUT POWER (mW)


THD

+ N

(%)

OUTPUTS INPHASE

ONECHANNEL


Figure 4. Output Power vs. Supply Voltage with Inputs In/Outof Phase


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______________________________________________________________________________________ 15

Powering Other Circuits from a Negative Supply

An additional benefit of the MAX4410 is the internallygenerated, negative supply voltage (-VDD). This voltageis used by the MAX4410 to provide the ground-refer-enced output level. It can, however, also be used topower other devices within a design. Current draw fromthis negative supply (PVSS) should be limited to 5mA,exceeding this will affect the operation of the head-phone driver. The negative supply voltage appears onthe PVSS pin. A typical application is a negative supplyto adjust the contrast of LCD modules.

When considering the use of PVSS in this manner, notethat the charge-pump voltage at PVSS is roughly pro-portional to -VDD and is not a regulated voltage. Thecharge-pump output impedance plot appears in theTypical Operating Characteristics.

Component SelectionGain-Setting Resistors

External feedback components set the gain of theMAX4410. Resistors RF and RIN (see Typical ApplicationCircuit) set the gain of each amplifier as follows:

To minimize VOS, set RF equal to 10kΩ. Values otherthan 10kΩ increase VOS due to the input bias current,which in turn increases the amount of DC current flowto the speaker.

Compensation CapacitorThe stability of the MAX4410 is affected by the value ofthe feedback resistor (RF). The combination of RF andthe input and parasitic trace capacitance introduces anadditional pole. Adding a capacitor in parallel with RFcompensates for this pole. Under typical conditionswith proper layout, the device is stable without theadditional capacitor.

Input FilteringThe input capacitor (CIN), in conjunction with RIN, forms ahighpass filter that removes the DC bias from an incom-ing signal (see Typical Application Circuit). The AC-cou-pling capacitor allows the amplifier to bias the signal to

an optimum DC level. Assuming zero-source impedance,the -3dB point of the highpass filter is given by:

Choose RIN according to the Gain-Setting Resistors sec-tion. Choose the CIN such that f-3dB is well below thelowest frequency of interest. Setting f-3dB too high affectsthe low-frequency response of the amplifier. Use capaci-tors whose dielectrics have low-voltage coefficients,such as tantalum or aluminum electrolytic. Capacitorswith high-voltage coefficients, such as ceramics, mayresult in increased distortion at low frequencies.Other considerations when designing the input filterinclude the constraints of the overall system and theactual frequency band of interest. Although high-fidelityaudio calls for a flat-gain response between 20Hz and20kHz, portable voice-reproduction devices such ascellular phones and two-way radios need only concen-trate on the frequency range of the spoken human voice(typically 300Hz to 3.5kHz). In addition, speakers usedin portable devices typically have a poor responsebelow 150Hz. Taking these two factors into considera-tion, the input filter may not need to be designed for a20Hz to 20kHz response, saving both board space andcost due to the use of smaller capacitors.

Charge-Pump Capacitor SelectionUse capacitors with an ESR less than 100mΩ for opti-mum performance. Low-ESR ceramic capacitors mini-mize the output resistance of the charge pump. Forbest performance over the extended temperaturerange, select capacitors with an X7R dielectric. Table 1lists suggested manufacturers.

Flying Capacitor (C1)The value of the flying capacitor (C1) affects the loadregulation and output resistance of the charge pump. AC1 value that is too small degrades the device’s abilityto provide sufficient current drive, which leads to a lossof output voltage. Increasing the value of C1 improvesload regulation and reduces the charge-pump outputresistance to an extent. See the Output Power vs.Charge-Pump Capacitance and Load Resistancegraph in the Typical Operating Characteristics. Above2.2µF, the on-resistance of the switches and the ESR ofC1 and C2 dominate.

fR CdB

IN IN− =3

12π

AV = −

RR

F

IN

Table 1. Suggested Capacitor ManufacturersSUPPLIER PHONE FAX WEBSITE

Taiyo Yuden 800-348-2496 847-925-0899 www.t-yuden.com

TDK 847-803-6100 847-390-4405 www.component.tdk.com

Note: Please indicate you are using the MAX4410 when contacting these component suppliers.


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16 ______________________________________________________________________________________

Output Capacitor (C2)The output capacitor value and ESR directly affect theripple at PVSS. Increasing the value of C2 reduces out-put ripple. Likewise, decreasing the ESR of C2reduces both ripple and output resistance. Lowercapacitance values can be used in systems with lowmaximum output power levels. See the Output Powervs. Charge-Pump Capacitance and Load Resistancegraph in the Typical Operating Characteristics.

Power-Supply Bypass CapacitorThe power-supply bypass capacitor (C3) lowers the out-put impedance of the power supply, and reduces theimpact of the MAX4410’s charge-pump switching tran-sients. Bypass PVDD with C3, the same value as C1, andplace it physically close to the PVDD and PGND pins(refer to the MAX4410 EV kit for a suggested layout).

Adding Volume ControlThe addition of a digital potentiometer provides simplevolume control. Figure 5 shows the MAX4410 with theMAX5408 dual log taper digital potentiometer used asan input attenuator. Connect the high terminal of theMAX5408 to the audio input, the low terminal to groundand the wiper to CIN. Setting the wiper to the top posi-tion passes the audio signal unattenuated. Setting thewiper to the lowest position fully attenuates the input.

Layout and GroundingProper layout and grounding are essential for optimumperformance. Connect PGND and SGND together at asingle point on the PC board. Connect all componentsassociated with the charge pump (C2 and C3) to thePGND plane. Connect PVDD and SVDD together at thedevice. Connect PVSS and SVSS together at thedevice. Bypassing of both supplies is accomplishedby charge-pump capacitors C2 and C3 (see TypicalApplication Circuit). Place capacitors C2 and C3 asclose to the device as possible. Route PGND and alltraces that carry switching transients away from SGNDand the traces and components in the audio signalpath. Refer to the layout example in the MAX4410 EVkit datasheet.

When using the MAX4410 in a UCSP package, makesure the traces to OUTR (bump C2) are wide enoughto handle the maximum expected current flow. Multipletraces may be necessary.

UCSP ConsiderationsFor general UCSP information and PC layout consider-ations, refer to the Maxim Application Note: Wafer-Level Ultra Chip-Scale Package.

OUTL

MAX4410

INL10

MAX5408

H0

L0

5

6

W0A 7

LEFT AUDIOINPUT

13W1A 10CIN RIN

CIN

RIGHT AUDIOINPUT

INR OUTR

RF

RF

11

8

H1

L1

12

11

RIN

Figure 5. MAX4410 and MAX5408 Volume Control Circuit


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______________________________________________________________________________________ 17

Typical Application Circuit

CHARGEPUMP

UVLO/SHUTDOWNCONTROL

CLICK-AND-POPSUPPRESSION

C1N

C1P

PVSS SVSS PGND SGND

PVDD SVDD SHDNL SHDNR

SVSS

SVDD

SGND

INL

INR

OUTR

LEFTCHANNELAUDIO IN

RIGHTCHANNELAUDIO IN

HEADPHONEJACK

1(B2)

2(A3)

3(A4)

4(B4)

5(C4)

6(D4)

7(D3)

8(D2)

9(D1)

10(C1)

11(C2)

12(B1)

14(A2)

MAX4410

C12.2µF

C22.2µF

( ) DENOTE BUMPS FOR UCSP.

1.8V to 3.6V

C32.2µF

CIN1µF

RIN10kΩ

RF10kΩ

SVSS

SVDD

SGND

OUTL

CIN1µF

RIN10kΩ

RF10kΩ

13(A1)


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1 2 3

C

B

A

D

UCSP (B16-2)

TOP VIEW(BUMP SIDE

DOWN)4

SVDD OUTL SVSS PVSS

INR SGND PVDD C1P

SHDNR SHDNL PGND

INL OUTR C1N

MAX4410

14

13

12

11

10

9

8

1

2

3

4

5

6

7

SGND

INR

SHDNR

OUTRPGND

C1P

PVDD

SHDNL

TOP VIEW

MAX4410

INL

SVDD

OUTLSVSS

PVSS

C1N

TSSOP

Pin Configurations

Chip InformationTRANSISTOR COUNT: 4295

PROCESS: BiCMOS


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Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to www.maxim-ic.com/packages.)

16L,

UC

SP

.EP

S


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Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses areimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to www.maxim-ic.com/packages.)

TSS

OP

4.40

mm

.EP

S


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