Αυτόματη Σχεδίαση VLSI Ανάλυση Κυκλωμάτων. SPICE -...

VLSI . SPICE - Microwind

VLSI 1


..........................................................................................................2 ............................................................................................................3 1. SPICE.......................................................................................................................3

1.1 ........................................................................................................3 1.2 SPICE ................................................................................................................4 1.3 spice.............................................................................5 1.4 ..............................................................................................7 1.5 .............................................................................................8 1.6 ........................................................................................................14 1.7 .........................................................................................................14 1.8 ..............................................................................................................15 1.9 (BJT) .............................................................................16 1.10 ....................................................................................................18

.........................................................................................20 2. .........................................................................20

2.1 Nand ...................................................................................................20 2.2 BIPOLAR TRANSISTOR..............................22 2.3 . ............................................24 2.4 ..........................................................25 2.5 ..............................................26

....................................................................................................27 3 MICROWIND .....................................................................................................27

3.1 Microwind:................................................................................27 3.2 MICROWIND:......................................................................29 3.3 FILE MENU: .....................................................................................................30 3.4 VIEW MENU:...................................................................................................33 3.5 EDIT MENU: ....................................................................................................37 3.6 SIMULATE MENU: ........................................................................................41 3.7 COMPILE MENU:..........................................................................................44 3.8 ANALYSIS MENU:.........................................................................................46

4 Microwind:...........................................................50 4.1 -well: .......................................................................50 4.2 : ....................................................................50 4.3 :.............................................................51 4.4 2o :..............................................................51 4.5 (contact): .............................................................51 4.6 via: ............................................................52 4.8 3 via3: ........................................................53 4.9 4 via4: ........................................................54 4.10 5 via5: ......................................................54 4.11 6: ....................................................................54 4.12 PADS:.............................................................................54

5 :....................................................................................................55

VLSI 2


VLSI 3

1. SPICE

1.1

, .

.

, . , , , (dc) ( ), ac, (, ) . , , .

. , . , , Computer Aided Circuit Analysis. 1960

. , IBM ECAP (Electric Circuit Analysis Program). , , ( , nodal notation), . , . ECAP , . , . ECAP . SPECTRE, TRAC, NET CIRCUS. SPICE (Simulation Program with Integrated Circuit Emphasis). PSpice (Personal computer Simulation Program with Integrated Circuit Emphasis). .


1.2 SPICE

To SPICE, , Simulation Program with Integrated Circuit Emphasis ( ). 1970 Berkeley California ... SPICE Dr Lawrence Nagel.

Nagel SPICE. To SPICE , (bugs), . SPICE, . (file)

( ) SPICE. To (, , , , ..) . , , . SPICE . , ,

( 0). . Kirchhoff () . SPICE . Newton - Raphson. SPICE.

. , , PSpice SPICE MicroSim. To PSpice, , Schematics Probe. To Schematics GUI (Graphical User Interface) (menu) . .SCH . , PSpice text files . .

To Probe , .PROBE. text files ( .CIR)

VLSI 4


. PSpice , , .

1.3 spice

SPICE : ) (source file) . ) . ) . ( .CIR) , . To PSpice . , , . , (schematic) , SPICE, : 1) . 1. PSpice . SPICE, SPICE2G.6 Berkeley . PSpice RLOAD rbaseql . 2) , 0. 0. . . 3) ( ) . ' . .

. To SPICE ac, dc, (transient), dc, dc, , Fourier. () . , ac, ( ) . , .. .

VLSI 5


1 C ()D F G I J - (JFET) K L - -

(MOSFET)Q (BJT) T V

SPICE . . . ' , SPICE . (default)

. .TF (), .

. .PRINT . .PLOT .

PSpice. , , . , PSpice graphics postprocessor

( ) PROBE. To PROBE , SPICE. To PROBE . PSpice .PROBE . PROBE (command shell) .

VLSI 6


VLSI 7

, : SPICE (text editor). To PSpice . .CIR. . .END. . ( ) . PSpice , .OUT. .

1.4

To SPICE . (scientific notation) 5.23E04, 8.45-6 , 10. 2. , () . (SI). 2 . , . .. 270V 270 ( V) 0.27KW 270 ( 1*103 W ) 0.27 270 ( 1*103 ).

2 F 1xl0-15 fempto 1x10-12 picoU 1x10-6 micro 1x10-3 milli- 1 Basic Unit 1x103 kiloMEG 1x106 megaG 1xl09 giga 1x1012 tera


1.5

.

.DC dc . . DC .

,

.DC SRC START STOP INCR

SRC START STOP INCR . volt ampere SRC2 . . .PRINT .PLOT , xxx.out.

.AC . SPICE dc (, ). . .

.AC LIN NP FSTART FSTOP .AC DEC ND FSTART FSTOP .AC OCT NO FSTART FSTOP

FSTART ( ) FSTOP . ,

LIN () FSTART FSTOP. =1 FSTART = FSTOP = .

DC ND ND . . FSTOP () FSTART, FSTOP.

VLSI 8


OCT NO NO . . FSTOP FSTART, FSTOP.

.DC . ac . .PRINT .PLOT xxx.out.

.TRAN transient (, ) . .

.TRAN TSTEP TSTOP


dc ( INPUTSCR) ( OUTPUTVAR) , , , .

: .TF V(5) VIN

5 VIN. .

.TF I(VIDRAIN) VGAIN

VEDRAIN VGATE. .

.SENS dc .

.SENS OV1 ...

OV1 , .

.DISTO .AC .

.DISTO RLOAD INTER


.DISTO , HD2, f1, f2. HD3, f1 f2. SIM2, (f1 + f2). DEM2, (f1 - f2). DEM3, (2f1 - f2)

.NOISE .AC .

.NOISE OUTPUTV INPUTSRC NUMSUM

ac . OUTPUTV . INPUTSRC . NUMSUM , . NUMSUM . NSUM = 5 ( ) 5 ac.

.NOISE V(2,3) VIN1 10

ac. 10 ac. 2 3 VIN1.

.FOUR Fourier . . 9 dc.

.FOUR FREQ OV1

.TRAN! dc 9 . FREQ . OV1 () Fourier. ( TSTART - ( )) TSTOP. ' 1/FREQ.

( .TRAN) ( ) 7100 .

VLSI 11


.FOUR 50 V(6) I(VSOURCE)

, Fourier 6 VSOURCE. 50z.

.TEMP SPICE .

.2


( ) . .IC , . , .

.WIDTH: ,

WIDTH IN = COLNUMIN OUT = COLNUMOUT

COLNUMIN SPICE. . . COLNUMOUT, 80 133. 133 , , .WIDTH OUT = 80 80 .

.OPTIONS: 32 (options) . . =x . 27 C.

.OPTIONS OPT1 2 = VAL...

.OPTIONS TNOM=0

0C.

.NODESET: , .NODESET V(NODENUM1) =

VAL1 V(NODENUM2) = VAL2...

NODENUM ( 0) VAL . To SPICE DC , . . SPICE . , .

VLSI 13


1.6 Rxxxxxx Nl N2 VALUE Rxxxxxx 1 2. value, (tnom) temp : VALUE(temp) = VALUE(tnom)* (1 + TC1*(temp-tnom) + TC2 (temp-tnom)2 ) TCI TC2 . TC1 TC2 , . : : R1 5 11 3.63 R1 5 11 3,6x 103 = 3600 .

1.7 Cxxxxxx N+ - VALUE N1, N2 . + - . C . , .TRAN UIC (use initial conditions, ). .TRAN (transient), . : C15 31 7 15U IC=-1V C15, 31 ( ) 7 ( ). 15*10-6F = 15 F 1V 31 7. , : Cxxxxxx + - POLY C0 C1 C2... C0, C1, C2... : C= C0 +C1*V +C2*V2+... To C farad V volt. VLSI 14


1.8 , Dxxxxxx N+ - MODNAME Dxxxxxx . + - . MODNAME .MODEL. , AREA - MODNAME Dxxxxxx. OFF - Dxxxxxx dc . IC=VD - SPICE VD , . , .MODEL MODNAME D MODNAME . To D . PARxx = PVALxxx 3.

3

. #

1 IS saturation current A 1,0 X 10-14 2 RS ohmic resistance 0 3 emission coefficient - 1 4 transit time s 0 5 CJO zero bias junction capacitance F 0 6 VJ junction potential V 1 7 grading coefficient - 0,5 8 EG activation energy eV 1,11 9 saturation current

temperature exponent - 3

10 KF flicker noise coefficient - 0 11 AF flicker noise exponent - 1 12 FC coefficient for forward bias

depletion capacitance formula - 0,5

13 BV Reverse breakdown voltage V Infinite 14 IVB Current at breakdown voltage A 1,0 X 10-3

VLSI 15


D1 7 9 H11 ( ). .MODEL H11 D(RS=0.5 BV=400 IBV=50M) , D1 + = 7 - = 9 11. 7 9. H11 0,5 , 400 V 50 mA

1.9 (BJT) , Qxxxxxx NC MODNAME To Q . Qxxxxxx . NC, , . MODNAME .MODEL . , NS - (substrate), 0. AREA - (BJT) MODNAME Qxxxxxx . OFF - Qxxxxxx dc . C = VBE, VCE - , UIC .TRAN. SPICE VBE , VCE - -, . , .MODEL MODNAME NPN : Q11 4 10 5 SMALLS .MODEL SMALLS NPN (BF=140) , Q11 (BJT), 4, 10 5. =140. NPN . 40 (PAR PVAL) . 4 .

VLSI 16


VLSI 17

4 ( Modified Gummel-Poon BJT )

# ' 1 IS transport saturation current A 1,0 X 10-16 2 BF ideal maximum forward beta - 100 3 NF forward current emission coefficient - 1 4 VAF forward early voltage V Infinite

5 IKF corner for forward beta high current roll-off A Infinite

6 ISE B-E leakage saturation current A 1,0 X 10-13 7 B-E leakage emission coefficient - 1,5 8 BR Ideal maximum reverse beta - 1 9 NR reverse current emission coefficient - 1 10 VAR reverse Early voltage V Infinite 11 IKR corner for reverse beta high current roll-off A Infinite 12 ISC B-C leakage saturation current A 0 13 NC B-C leakage emission coefficient - 21,5 14 RB zero bias base resistance Ohms 0

15 IRB current where base resistance galls halfway to its min value A Infinite

16 RBM minimum base resistance at high currents Ohms RB 17 RE emitter resistance Ohms 0 18 RC collector resistance Ohms 0 19 CJE B-E zero-bias depletion capacitance F 0 20 VJE B-E built-in potential V 0,75 21 MJE B-E junction exponential factor - 0,33 22 TF ideal forward transit time sec 0 23 XTF coefficient for bias dependence of TF - 0 24 VTF voltage describing VBC dependence of TF V Infinite 25 IRF high-current parameter for effect of TF A 0 26 PRF excess phase at freq=l,0/(TF*2PI)Hz deg 0 27 CJC B-C zero-bias depletion capacitance F 0 28 VJC B-C built-in potential V 0,75 29 MJC B-C junction exponential factor - 0,33

30 XCJC fraction of B-C depletion capacitance connected to interval base node - 1

31 TR ideal reverse transit time Sec 0 32 CJS zero-bias collector-substrate capacitance F 0 33 VJS substrate junction built-in potential V 0,75 34 MJS substrate junction exponential factor - 0

35 forward and reverse beta temperature exponent - 0

36 EG energy gap for temperature effect on IS EV 1,11 37 temperature exponent for effect on IS - 3 38 KF flicker-noise coefficient - 0 39 AF flicker-noise exponent - 1


40 FC coefficient for forward-bias depletion capacitance formula - 0,5

1.10 : Vxxxxxx + - To N+ - + - . . To DC + - . To DC/TRAN-VALUE (VALUE) DC . . To AC . ACMAG ACPHASE ( ). ACMAG ACPHASE ACMAG 1 V ACPHASE . , , 5 , 5 , (TRANKIND): pulse, sinusoidal, exponential, piece wise linear FM : 1. PULSE. . Vxxxxxx N+ N- PULSE (V1 V2 TD TR TF PW PER) PULSE . V1 volt ampere ( ), V2 volt ampere ( ), TD ( , default, 0) second, TR ( tstep) second, TF ( tstep) second, PW ( tstop) second, PER ( tstop) second. TSTEP TSTOP .TRAN TSTEP TSTOP . 1.

VLSI 18


2. SIN. . () . : Vxxxxxx N+ N- SIN(V0 VA FREQ TD THETA) V0 (offset) volt ampere ( ), VA volt ampere ( ), FREQ ( 1/TSTOP) Hz, TD ( 0) second, ( 0) 1/s. 2.

TSTEP TSTOP .TRAN TSTEP TSTOP . t TD V = V0 t TD V = V0 + VA * exp( -(t-TD) * theta) * sin (2 * *freq * (t - TD ))

VLSI 19


2.

2.1 Nand

1) PSPICE Nand7400.cir text editor .

2) . 3) DC

(V8) (V1) 4) Transient . 5) ;

VLSI 20


Input File . STANDARD 7400 TTL INPUT VCC 3 0 DC 5V VIN 1 0 PULSE (0V 5V 0S 2NS 2NS 50NS 100NS) RB 3 2 4K RC 3 4 1.6K RCP 3 6 120 RD 5 0 1K DP 7 8 METAB1 DC 0 1 METAB1 .MODEL METAB1 D (CJO=0.5PF) Q1 9 2 1 METAB2 QS 4 9 5 METAB2 QP 6 4 7 METAB2 QO 8 5 0 METAB2 . MODEL METAB2 NPN (BF=100 VA=80 IS=1E-14 VA=80 + RB=100OHM RC=2OHM CJC=2PF CJE=4PF) .DC VIN 0V 5V 0.1V .PLOT DC V (8) .TRAN 1NS 125NS .PLOT TRAN V(1) V(8) .END

VLSI 21


2.2 BIPOLAR TRANSISTOR

1) PSPICE Bipolar.cir Input File .

2) PSPICE 0,1,2, 3.

3) DC , , I(VM).

1

VLSI 22


VLSI 23

4) Input File

Bipolar transistor characteristics .MODEL Q2N2222 NPN IS=3f VAF=140 BF=250 VAR=60 BR=7 + TR=50n TF=450p VTF=10 XTF=2 ITF=.1 NF=1.0 NR=1.1 NE=1.55 + NC=2 ISE=150f ISC=100f NK=0.9 IKF=20m IKR=5m RB=50 RC=10 + RE=0.2 CJC=15p VJC=.75 MJC=.45 FC=.5 CJE=25p VJE=.75 + MJE=.33 XTI=3 XTB=1.5 EG=1.11 IB 0 1 VC 3 0 VM 3 2 QA 2 1 0 Q2N2222 .DC VC 0 5V 0.05V IB 10U 100U 10U .PRINT DC I(VM) .END


2.3 .

1) spice input file .

2) Spice 3) V(3) , V(6) . 3) . 4) transient ,

input file. 2 1, SPICE , :

12

1INVR

Rout

= ..

24

31 INVRR

out

+= ..

VLSI 24


inverting and non-inverting amplifiers .SUBCKT AMP 1 2 3 RIN 1 2 1MEG ROUT 3 4 1K E1 4 0 1 2 1MEG .ENDS AMP VIN1 1 0 DC 1V VIN2 4 0 DC 1V R1 2 3 10K R2 1 2 1K R3 5 6 10K R4 5 0 1K X1 0 2 3 AMP X2 4 5 6 AMP .TF V(3)VIN1 *.TF V(6) VIN2 .OP .TRAN 1 1 0 .END

2.4

RE. CE.

CE

VLSI 25


1. transit Vin Vout CE

2. AV, CE 3. .

VIN 0 1MV 1 spice Q : IS=1.9E-14 BF=150 VAF=100 IKF=.175 ISE=5E-11 NE=2.5 + BR=7.5 VAR=6.38 IKR=.012 ISC=1.9E-13 NC=1.2 RC=.4 + XTB=1.5 CJE=26PF TF=.5E-9 CJC=11PF TR=30E-9 KF=3.2E-16 + AF=1.0

2.5

1) V1,V2 1 0 . 5V.

2) spice () : IS=1E-14 CJO=30p VJ=0.8 TT=1n RS=5 M=0.5 BV=50 IBV=2m

3) .

4) transit . 5) ;

VLSI 26


3 MICROWIND

3.1 Microwind:

Microwind (INSA) Microwind . . editor . , . (2D 3D , VERILOG MOS). ( ) . ( , .). , . (3D) , 2D.

VLSI 27


MICROWIND : nanoLambda: CMOS 90nm DSCH: VirtuosoFab: - PROthumb : PROtutor : MEMsim : Microwind. Microwind, . Microwind2 Microwind3, .

VLSI 28


3.3 FILE MENU: New (File menu): click File New . , . Undo . Open (File Menu) : . ".MSK" . CIF ".CIF". CIF CIF MSK . Insert (File Menu) : File Insert MSK . . .

Import CIF (File Menu) :

File Import CIF ( ) File Open (with type "CIF file") CIF , : CADENCE, MENTOR, ZUKEN ...

VLSI 30


Microwind CIF . .RUL , CIF : "CIF ". , Microwind "metal" "mtl1" CIF . metal boxes 0,01m CIF , 0.01m CIF . overetch , 2 . : cif metal mtl1 0.01 Save/Save as (File Menu) :

click File Save . ".MSK".

"Save As", , . . " Save ". .MSK.

Convert into (File Menu) : o Microwind CIF , "File Convert Into CIF layout file". CIF CAD VLSI. Microwind CIF, over-etch. overetch CIF , .

click " Convert to CIF " . .

1nm. CAD tools.

CMOS 0.25m (cmos025.RUL), overetch . overetch

, .

Microwind SPICE netlist "File Convert Into SPICE netlist". SPICE. , SPICE netlist . . : model 1, model 3 model 9.

VLSI 31


SPICE n-channel p-channel (transistor) & .

, , .

SPICE .CIR

Select Foundry (File menu): File -> Select Foundry. . . 1.2m - 0,05m. .

Core supply (V)

Core Oxide (nm)

Chip size (mm)

Input/output pads

K

1.2m 1986 2 5.0 25 5x5 250 Cmos12.rul 0.7m 1988 2 5.0 20 7x7 350 Cmos08.rul 0.5m 1992 3 3.3 12 10x10 600 Cmos06.rul 0.35m 1994 5 3.3 7 15x15 800 Cmos035.rul0.25m 1996 6 2.5 5 17x17 1000 Cmos025.rul0.18m 1998 6 1.8 3 20x20 1500 Cmos018.rul0.12m 2001 6-8 1.2 2 22x20 1800 Cmos012.rul90nm 2003 6-10 1.0-1.2 1.2 25x20 2000 Cmos90n.rul65nm 2005 6-12 1.0-1.2 1.2 25x20 3000 Cmos65n.rul

Colors (File Menu) :

: . . "Alt" + "Print" . , Word, "Edit Paste". .

. , .

Properties (File Menu) :

File Properties , . "extract now ", .

VLSI 32


Print Layout (File Menu):

click File Print Layout . , + . text editor graphic editor, click "Edit Paste ". (File Colors Switch to Monochrom). .

Leave Microwind (File Menu) :

click File Leave Microwind o . , . Windows.

3.4 VIEW MENU: Refresh (View Menu): .

Unselect All (View Menu):

click View Unselect All ( ) . , View Interconnect View Node, .

View All (View Menu CTRL+A):

click View View All .

Zoom In/Out (View Menu CTRL+A, CTRL+O):

. , . , .

click , .

Ctrl+A "View All ", Ctrl+o . View Node (View Menu CTRL+N): VLSI 33


click "View Node" o View View Node. , click . , . , . , , (navigator window). "Unselect", "Hide", View Unselect All , - .

Mos List (View Menu):

"View MOS List" n-channel p-channel MOS . MOS navigator window. click MOS , . Label List (View Menu): click "View Label List" . navigator window. . .

Navigator Window (View Menu): navigator window :

VLSI 34


Palette Menu (View Menu): . tick . (PO). :

tick , . (Cut), (Stretch) (Copy), .

View Protect all . tick .

View Unprotect all . .

Simulation Icons (Palette window):

. , . . VLSI 35


VDD & VSS: Vdd, 0V Vss. CLOCK: , : , , , . - (ns). , .

0 1 .

VDD VSS, Invert L/H.

Period * 2 , .

Period / 2 , . PULSE: "Level 0" (0 by default) "Level 1" (VDD by default), .

"0101100" " Insert". .

"Erase" .

SINUS: (amplitude), (offset), (frequency) (phase). VISIBLE NODE: , . , , .

VLSI 36


3.5 EDIT MENU:

Undo (Edit Menu): Undo (Edit Undo) . , Cut, Paste, Copy, Move, Stretch, Edit Compile.

Cut (Edit Cut or CTRL+X):

click Cut. , . , . click Undo .

. , .

. tick .

click, . .

Copy (Edit Copy or Ctrl+C):

click Copy. , . , . . click . click Undo Copy. VLSI 37


Paste (Edit Menu):

click .

Move Area or Stretch (Edit Menu): , click Stretch,Move " Edit Move Area or Stretch". , . , . , . .

, click . tick.

, click . . . .

: , , .

Move step by step (Edit Menu):

lamda lamda, click " Edit Move Step by Step". , . . , . ( lamda) Edit.

Flip & Rotate (Edit menu):

flip , Edit Flip & Rotate. :

Flip horizontal Flip vertical Rotate 90 Rotate -90

, .

Protect/Unprotect All (Edit Menu):

"View Protect All" . tick .

" View Unprotect All" . tick .

VLSI 38


Generate (Edit Menu):

contacts, devices pads. , . Edit Generate.

: / , - / , - / / metal2 metal2 / Metal3, , . . . pad .

MOS: n-channel p-channel transistor. : ( ), , . , . .

PADS: pad, pad ( 30x30 m), pads VDD VSS. ( pds), pads VDD VSS, pads VDD/VSS.

: . , . . VDD VSS .

BUS: , . bus .

: . . Microwind, , .

Virtual R,L,C (Edit Menu):

: , . : . VLSI 39


, a/d . :

1. .

2. " Edit Virtual RLC Resistance "

3. .

, :

( 1200) : R(poly),R(metal), R(All).

, , Microwind .

: , . : , .

Duplicate XY (Edit Duplicate XY):

Duplicate XY RAM . Edit Duplicate XY, . , 2. . , . .

Connect Layers (Edit Menu):

" Connect Layers" . . , 3 , poly/metal, metal/Metal2 metal2/metal3 . Draw Box (Edit Menu Generate Box): " Draw Box " . . .

VLSI 40


" Draw Box ", . , . . . . . tick , . tick . Measure distance (Edit Menu): (dx dy) , lamda . () m. View Menu ( View Refresh) .

3.6 SIMULATE MENU:

Run Simulation (Simulate Menu CTRL+S):

"Run simulation" Run Start Simulation . Voltage vs Time t

. , VDD/2. ,

VLSI 41


. . Voltage and Currents

VDD, VSS MOS . , . Voltage vs Voltage

- - . . ( ), , Schmitt . 0 VDD. "Simulate" VDD 0. Frequency & Voltages

. Using Models (Simulate Menu): . , MOS BSIM4. LEVEL1 MOS level1, LEVEL3 MOS level3, BSIM4 BSIM4. Simulation Parameters (Simulate Menu): () (). . MOS 1.3 BSIM4. . . Simulation on Layout (Simulate Menu): . DAC. Crosstalk (Simulate Menu): . crosstalk affector . "Simulate With crosstalk" . "Evaluate Min/Max" crosstalk.

VLSI 42


: ) , ) ) crosstalk. , crosstalk . crosstalk (w=4) (d=4). Microwind, W . 1/d. Simulation parameters (Simulate Menu): . . . VDD &VSS: Vdd (0V) Vss. CLOCK: , : , level one, level zero. (ns). , . level 0 level 1 . VDD VSS, Invert L/H. Period*2 . eriod/2 . PULSE: "Level 0" ( 0 by default) "Level 1" (VDD by default) . : "0101100" "Insert". . "Erase": , . SINUS: , offset . VISIBLE NODE: . , , . UV Exposure (Simulate Menu): ( 2nm). , , . MOS Characteristics (Simulate Menu): "MS characteristics". Id/Vd MOS ( W=20m, L-L) . 1 MOS, 3 MOS MOS BSIM4.

VLSI 43


(/), . "ld vs. Vg" threshold voltage. "ld(log) vs. Vg" sub-threshold . "Threshold Voltage" VT . "Capacitance" Cgs & Cgd. ".MES" file. . Process Section in 2D (Simulate Menu): "Process View" "Simulate Process in 2D" . . , . . Process Steps in 3D (Simulate Menu): "3D" "Simulation Process Steps in 3D" 3D . "Next step" . . .

3.7 COMPILE MENU:

Compile one line (Compile Menu): CMOS . Compile Compile one line. . "=", "~" "&" "|". . 8 .

VLSI 44


Cell Formula Inverter out=~in NAND gate n=(~a&b) 3 Input OR s=a|b|c 3 Input NAND out-~(a&b&c) AND=OR Gate cgate=a&(b|c) CARRY Cell cout=(a&b)|(cin(a|b)

Transistor: . NMOS PMOS PILE. : p-channel n-channel . , . " ~" " = ", . NAND . Compile Verilog (Compile Menu Compile

VERILOG file): - VERILOG . Compile Compile Verilog File. VERILOG "Generate". .

PRIMITIVE NODES EXAMPLE

dreg Inputs : Data,RESET, CLOCK

Outputs: Q, nQ

dreg reg1(d,rst,h,q,nq);

Inv, not Inputs : IN

Outputs: OUT

inv inv1(s,e); // both inv and not

not inv1(s,e); // can be used

And Inputs : 2 to 4

Outputs: S

and and1(s,a,b,c,d); // limit inputs to 4

nand Inputs : 2 to 4

Outputs: S

nand nand1(s,a,b,c,d);

VLSI 45


Or Inputs : 2 to 4

Outputs: S

or or3(s,a,b,c);

Nor Inputs : 2 to 4

Outputs: S

nor my_nor4(s,a,b,c,d);

Xor Inputs : a,b

Outputs: S

xor xor_gate(xor_out,d0,d1);

Nmos Inputs: gate, source

Outputs: drain

nmos nmos1(d,s,g);

3.8 ANALYSIS MENU:

Design Rule Checker (Analysis Design Rule Checker CTRL+D):

(DRC: Design Rule Checker) . click Analysis Design Rule Checker DRC. , . . , click Help Design Rules, .

Parametric Analysis (Analysis Menu):

Microwind . . , .

click Analysis Parametric Analysis.

, . . .

, "node capacitance". .

, , .

VLSI 46


"Start Analysis". . , .

Find Floating Nodes (Analysis menu):

click Analysis Find Floating Nodes, . navigator menu. . . .

Measure Distance (Analysis menu):

(dx dy) lamda . mm.

Resonant Frequency (Analysis menu):

resonant . resonant (2*3.14)/(L*C)^(1/2), (L*C)^(1/2).

Interconnect Analysis with FEM (Analysis menu):

R, L C . ground plane. , RUL.

Add Text : ADD TEXT, . . , :

ADD TEXT. . . "Label name:" "Assign".

o .

VLSI 47


:

ADD TEXT, . . "Assign".

, , VDD VSS . : highlights:

Microwind E. Sicard.

CMOS: MOS polysilicon Gate N+ diffusion Source Drain. MOS polysilicon Gate + diffusion Source Drain.

MICROWIND: MSK: a Mask editor. Device Generator: an auto-router standard : MOS, CAP, IND, RES, PAD. CIF converter: Microwind Calma . DRC: EXTRACT: . SIM: , DSCH: . 2D & 3D viewer: 2D and 3D .

Microwind: (Layout editor)

VLSI 48


Microwind: 1. To Microwind MSK (mask)

, 2. Microwind

. 3. To Microwind MSK CIF (Caltech

Intermediate Format) internet MOSIS.

4. Microwind MOS . ( Microwind).

VLSI 49


4 Microwind:

4.1 -well: R101 : 12* R102 : 12* R110 : 144*2

4.2 : R201 + + : 4* R202 + + : 4* R203 -well + : 6* R204 + -well: 6* R205 + : 2* R206 N-well + : 6* R210 : 24*2

VLSI 50


4.3 : R301 : 2* R302 : 2* R303 MOS: 4* R304 block : 3* R305 : 2* R306 : 4* R307 : 3* R310 : 8*2

4.4 2o : R311 polysilicon2: 2* R312 polysilicon2 : 2*

4.5 (contact): R401 : 2* R402 : 5* R403 : 2* R404 polysilicon : 2* R405 : 2* R406 poly : 3*

VLSI 51


4.6 via: R501 : 4* R502 : 4* R510 : 32*2 R601 via: 2* R602 via: 5* R603 via : 0 R604 via: 2* R605 2 via: 2*

VLSI 52


4.7 2 via2: R701 : 4* R702 2: 4* R710 : 32*2 R801 via2: 2* R802 via2: 5* R804 2 via2: 2* R805 3 via2: 2*

4.8 3 via3: R901 3: 4* R902 3: 4* R910 : 32*2 RA01 via3: 2* RA02 via3: 5* RA04 3 via3: 2* RA05 4 via3: 2*

VLSI 53


4.9 4 via4: RB01 4: 4* RB02 4: 4* RB10 : 32*2 RC01 via4: 2* RC02 via4: 5* RC04 4 via4: 3* RC05 5 via4: 3*

4.10 5 via5: RD01 5: 8* RD02 5: 8* RD10 : 100*2 RE01 via5: 4* RE02 via5: 6* RE04 5 via5: 3* RE05 6 via5: 3*

4.11 6: RF01 6: 8* RF02 6: 8* RF10 : 300*2

4.12 PADS: RP01 pad: 100m RP02 pad: 100m RP03 via: 5 m RP04 : 5 m RP05 pad & : 20m

VLSI 54


VLSI 55

5 : . Principles of CMOS Vlsi design: A system perspective Neighl H.E. Weste Karmaran Eshraghian http://www.ateneonline.it/spirito/materiali_didattici_integrativi/tutorialmw2/tutorial.swf http://iteso.mx/~emguerrero/Cursos/TDFCSE/III_CAD_tools_O2006.pdf http://www.csit-sun.pub.ro/courses/as/Curs_VLSI_6/Curs_6-VLSI.pdf http://www.inf.uth.gr/~bisdounis/VLSI_laboratory.pdf
http://www.ateneonline.it/spirito/materiali_didattici_integrativi/tutorialmw2/tutorial.swfhttp://www.ateneonline.it/spirito/materiali_didattici_integrativi/tutorialmw2/tutorial.swfhttp://iteso.mx/%7Eemguerrero/Cursos/TDFCSE/III_CAD_tools_O2006.pdfhttp://www.csit-sun.pub.ro/courses/as/Curs_VLSI_6/Curs_6-VLSI.pdfhttp://www.inf.uth.gr/%7Ebisdounis/VLSI_laboratory.pdf

Αυτόματη Σχεδίαση VLSI Ανάλυση Κυκλωμάτων. SPICE -...

Documents

Transcript of Αυτόματη Σχεδίαση VLSI Ανάλυση Κυκλωμάτων. SPICE -...

BAR CODE - plaisio-cdn.gr · Αυτόματη κλωνοποίηση αποκωδικοποιητών σε λιγότερο από 10 δευτερόλεπτα – πάνω από

yundai 30 · Στάσης-Επανεκκίνησης, που σας υποστηρίζει με την αυτόματη επιβράδυνση, σταμάτημα και την εκκίνηση

Αυτόματη Απομαγνητοφώνηση ιατρικών γνωματεύσεων | Indigital

Λειτουργικές Απαιτήσεις - elidek.gr · Web viewOfficeProPlus 2019 SNGL OLP NL Acdmc. 4. ABBY FINEREADER 15 standard. 5. PHPMaker-DBMaker latest edition. Αυτόματη

Φαρμακοποιοίs/f...GMATE®ORIGIN που διαθέτει μεγάλη, ευανάγνωστη οθόνη, εργονομικό σχεδιασμό, αυτόματη κωδικοποίηση,

Ψηφιακό Δίκτυο Ολοκληρωμένων Υπηρεσιών Integrated Services Digital Network

Content Provider Dashboard€¦ · Content Provider Dashboard Διαλιουργικόηα αποθηρίων και μπλουιμός ... (Dublin Core, DataCite) ... repositories

IBM Cognos for Microsoft Office 1020 Gn wUpublic.dhe.ibm.com/software/data/cognos/documentation/... · 2013. 10. 16. · IBM Cognos Go! Dashboard w½sRW b IBM Cognos BI ñANIBM Cognos

Βόλτα στο dashboard - squat.grsquat.gr/files/2009/11/blog_tutorial_1.2.pdfΔημιουργία blog Για να ανοίξουμε ένα blog, πρώτα από όλα, χρειάζεται

K MMERLING 88plus - vovos-systems.grσχετίζονται με κουφώματα και σκίαση. Η ποικίλη παλέτα ολοκληρωμένων συστημάτων

καλλιεργω τον σχολικο μας κηπο με ντοπιους παραδοσιακους [αυτόματη αποθήκευση]

Ετοιμασία ολοκληρωμένων οργάνων μέτρησης · 2017-01-05 · δημοσίευσης και επεξεργασίας εικόνων. Ρυθμίστηκαν

Στρατηγική ολοκληρωμένων επικοινωνιών- Μητρικός Θυλασμός

Boditrax dashboard 2013 (1)

D.P.M. Reader Dashboard - Pinssarpinssar.com.au/wp-content/uploads/2016/07/Pinssar-spec-sheet-july... · Alstom Alspa TCP/IP Master via SRTP BACNet 802.3 Master Richards-Wilcox Intelligent

Druck DPI 620 Genii Advanced Modular Calibrator · 3 May 2013 K0542 Issue 2 1-6 8 Example Dashboard Functions 8.1 Calibrator Fig 4 Calibration Screens Use this application to compare

GR - toll-collect.de · Η συσκευή οχήματος δεν συμμετέχει στην αυτόματη μέθοδο στη Γερμα-νία, επειδή η συσκευή

ΤΟΜΕΑΣ ΟΧΗΜΑΤΩΝ - 2310889923€¦ · Πλανητικό σύστημα κίνησης και η λειτουργία του. Αυτόματη μετάδοση. Μέρη