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  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    : : , . Tanenbaum, Vrije Universiteit, Amsterdam.Computer Organization, W. Robinson, CS-231, Vanderbildt Univesrity.Computer Systems: a Programmers Perspective, R. Bryant, D. O' Hallaron, Carnegie-Mellon University. , . , , . , . , . ,

    : .. , , .

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    , , Pentium 4

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    . () .

    assembly

    ( )

  • cslab@ntua 2007-2008

    4

    Assembly

    Control Signal Specification

    Assembly,

    ,

    temp=v[k];

    v[k]=v[k+1];

    v[k+1]=temp;

    load$15,0($2)load$16,4($2)store$16,0($2)store$15,4($2)

    0000 1001 1100 0110 1010 1111 0101 10001010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111

    ALUOP[0:3]

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    Instruction Set Architecture (ISA)

    ISA . . (dis-assembly). Java .

    `

    Java program...

    JVM

    bytecodecompilerinterpreter

    bytecode hardware( )

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    ISA-32 ntel 64: ISA Intelhttp://www.intel.com/products/processor/manuals/index.htm : Software Developers Manual: Basic Architecture .K

    JVM: ISA Sun JAVAhttp://java.sun.com/docs/books/jvms/second_edition/html/VMSpecTOC.doc.html IJVM.

    . A

    : SPARC, MIPS..

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    Chapter 1 About This Manual. Chapter 2 Intel 64 and IA-32 Architectures. Chapter 3 Basic Execution Environment.Chapter 5 Instruction Set Summary. Chapter 6 Procedure Calls, Interrupts, and Exceptions. Chapter 7 Programming with General-Purpose Instructions. Chapter 8 Programming with the x87 FPU. Chapter 9 Programming with Intel MMXTM Technology. Chapter 10 -12 Programming with Streaming SIMD Extensions (SSE).Chapter 13 Input/Output. Chapter 14 Processor Identification and Feature Determination.

    Intel 64, IA-32

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    1 Introduction2 Java Programming Language Concepts3 The Structure of the Java Virtual Machine4 The class File Format5 Loading, Linking, and Initializing6 The Java Virtual Machine Instruction Set7 Compiling for the Java Virtual Machine8 Threads and Locks9 Opcode Mnemonics by Opcode

    JVM

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    * / / '' .

    * /, ( ).

    * ' ,

    * : ( ' / / ). , , .

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    - : ; (1)

    * ; ; ;

    * ; ; ( - ).

    * ;

    * - ; ( ).

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    * ; opcodes;

    * (operads); ; ( ) (, addressing modes);

    * ;

    * (, - );

    * ; (, ).

    - : ; (2)

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    (1)

    '' , '' , .

    , , .

    , (semantics) .

    (, ..)

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    (2)

    (Register Files)

    ( 64, 128, 256..), .

    Scoreboarding Graph Coloring Register File.

    , , stack local variable frame.

    .. ..

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    ' ( ).

    CPU ( , ILP).

    ( ).

    , Load, Store .

    ( register file).

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    ; (1) ( ).

    . , ...

    : .

    , (backward compatiblity).

    .

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    ; (2) Pentium SISC

    ADD mem, reg // mem = mem + reg

    M RISC

    LOAD tempreg1, memADD tempreg2, tempreg1, regSTORE mem, tempreg2

    RISC.

    SPARC MIPS RISC RISC.

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    ; (3) JVM bytecode Stack

    LOAD mem1LOAD mem2 ADDSTORE mem2

    O Java compiler JRE bytecode bytecode. CISC

    LOAD tempreg1, mem1ADD mem2, tempreg1

    RISC .

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    ; (4)

    M PicoJava bytecode ' RISC

    LOAD tempreg1, mem1 LOAD tempreg2, mem2 ADD tempreg2, tempreg1, tempreg2STORE temreg2, mem2

    , register file.

    ADD tempreg2, tempreg1, tempreg2.

    '' hardware-firmware-software..

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    , , Pentium 4

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    (1)

    byte/word addressable bytes ;

    aligned non-aligned (word = 4 bytes) offset (0, 4, 8, 12, ...) ( );

    little endian big endian bytes , bytes ( );

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    Bytes

    (a) Big endian (b) Little endian

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    bytes

    8 bytes little-endian.(a) . (b) .

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    (2)Pentium: A (little-endian)

    JVM: (big-endian)

    Pentium: 8 bytes (64 bits), 32 8 bits backward compatibility (x86). - (non-aligned) . Instruction / Data L1 Cache.

    JVM: Byte/Word Addressable ( 8 bits / 32 bits). (aligned) .

    Pentium: Retirement Unit.

  • Kernel virtual memory

    Memory mapped region forshared libraries

    Run-time heap(created at runtime by malloc)

    User stack(created at runtime)

    Unused0

    Memoryinvisible touser code0xc0000000

    0x08048000

    0x40000000

    Read/write data

    Read-only code and data

    Loaded from the hello executable file

    printf() function

    0xffffffff

    Pentium

    O stack heap

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    (Modes) PentiumReal mode: Pentium 8086 (16 bit, ).

    Virtual 8086 mode:T sandbox 8086 ( MS-DOS Windows)

    Protected mode: 32 bit (IA-32).

    ntel-64 mode: 64 bit.

    Kernel mode: (signal handling) (kernel) .

    User mode: .

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    JVM

    JVM. Heap garbage collection.

    Heap

    newarray int

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    (Program Counter, PC) (Instruction Register, IR MBR)

    (Memory Address Register, MAR) (Memory Data Register, MDR)

    (R0, R1, R2, ..., R7) (Accumulator, AC) (Stack Pointer, SP) Index, Base, Offset Registers ( LV, CPP..)

    (Status Register, SR Process Status Word PSW)

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    :

    ( ) ;

    PC, IR, MAR, MDR;

    , semantics .

    .

  • Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc. All rights reserved. 0-13-148521-0

    Pentium (1) , (mul, div, strings)

    , ,

    (Segments)

  • EFLAGS ~ Processor Status