201

1.2 ( : 2004)

. .

1. ,

, (.. ) (.. ). . ( ) , ( (Finite State Machine FSM). , (.. ). , (interface) . : , , , . : Flip-Flop, : , (/), : , , , . To Datapath Control Path (Bus) (Register File) / (ALU) PC, IR, MAR, MDR (Flags) Processor Status Word Program Counter, , Processor Status Word (PSW). PSW , . , (.. ), .

, , . . ( Tsetup ) . , / (ALU) , , . (deterministic),

M /

Processor

Data

InstructionsPeripheral

1

Memory

I/O Bus (.. PCI)

Peripheral

RF STATUS DATA

STATUS

DATA

CONTROL CONTROL

2. (, ASCII),

, Floating Point , H 0 1. , TTL 0 0.8 Volt 1 1.6 Volt. (.. 4Volt 1), . :

(.. ADD, SUB) (.. ) (.. A)

, , .. 1s complement, 2s complement, (unsigned), BCD, (floating point), . 0 1 . (.. ). , . , :

: , , , , , ...

: , , , V, V, VI, IX, X, XI,

: XYZ 10 :

X * 102 + Y * 101 + Z * 100 : n :

dn-1dn-2d1d0 : (Base, radix) 10 0...9 ( 10 ) (MS digit) => o (LS digit) =>

: n dn-1dn-2d1d0 : n-1 di * 10i i = 0 base radix. 10 0...9, 10 . (Most Significant, MS) , (Least Significant, LS) .

: : 2, 0, 1

: 0101012 = 2110 : 0, 0, 1,...,7 ( 8 )

: 01278 = 1*82 + 2*81 + 7*80 = 64+16+7 = 8710 : 16, 0, 1,...9, A, B, C, D, E, F ( 16 )

: 1B316 = 1*162 + B*161 + 3*160 = 1*256+11*16+3*1 = 43510

: A = 10, B = 11, C = 12, D = 13, E = 14, F = 15

0-15 , , .

0 0000 0 0 1 0001 1 1 2 0010 2 2 3 0011 3 3 4 0100 4 4 5 0101 5 5 6 0110 6 6 7 0111 7 7 8 1000 10 8 9 1001 11 9

10 1010 12 A 11 1011 13 B 12 1100 14 C 13 1101 15 D 14 1110 16 E 15 1111 17 F

. .. 17110 .

171 16 ( 11, 10). 10 16 ( 10, 0) . : 10, 11 17110 = 16. : 10*16 + 11 = 160 + 11 = 171.

, . .. 2810 .

28 2 ( 0, 14) (LS bit) 14 2 ( 0, 7) 7 2 ( 1, 3) 3 2 ( 1, 1) 1 2 ( 1, 0) (MS bit) . 2810 111002 : 1*24 + 1*23 + 1*22 + 0*21 + 0*20 = 2810.

, - . 11002 1*23 + 1*22 + 0*21 + 0*20 = 8 + 4 = 1210.

2.3.1 () . ( ) bits. n bits, 2n . . . - n bits 0 2n-1, 2n .

2.3.2

16 10: 0x = 10 * 161 + 11 * 160 = 160 + 11 = 171

10 16: LS MS 0 * 162 + 10 * 161 + 11 * 160 => 0xAB 10 16 LS MS 1 * 162 + 10 * 161 + 11 * 160 => 0x1AB

171 16 11 10 16

10 0

427 16 11 26 16

10 1 16 0

28 2 0 14 2

0 7 2

10 2

11100 LS MS

2 10 11100 = 24 + 23 + 22 + 0 + 0 = 16 + 8 + 4 = 28 : . ( + , sign + magnitude). bit ( , ) (0 = +, 1 = ). 8 bits: ------------8-bits-----------

2n-1 + 0 = 2n 1, 8 bits 127. , +0, 0.

2: (twos complement). , . 1. 7 8 bits : 7 00000111. bits 11111000, 1, 7 2: 11111001.

:

-7 =>

2, (MSB) (1 => , 0 => ).

1 3 2 1 1 2 1 0

0 0 0 0 0 1 1 1 = +7

1 0 0 0 0 1 1 1 = -7

0 0 0 0 0 0 0 0 = +0

1 0 0 0 0 0 0 0 = 0

0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 + 1 1 1 1 1 1 0 0 1

2, (00000000).

2n , 2n-1 2n-1-1. 8 bits [128,127]. : - () .

: . + , . , , . , . :

7 + 3 = 00000111 + 00000011 = 00001010 (1010) 7 + (-3) = 00000111 + 10000011 = 00000111 00000011 = 00000100 (410) -7 + (-3) = 10000111 + 10000011 = 10001010 (1010)

2: . + , ( Bits) ! . , = +1 Bits . , + (-) + +1. 2 , 1. 8 Bits:

7 + 3 = 00000111 + 00000011 = 00001010 (1010) 7 + (3) : 3: 3 = 00000011 => -3 = 11111100 + 1 = 11111101. 7 3:

00000111 + 11111101 00000100 = 410

7 + (3) : 7 11111001 3 11111101.

11111001 + 11111101 11110110 =1010

carry out (8 ) bits . Overflow () . Underflow () .

2 4 bits

0 x y z 0 w v u 0 1 a b c ,

=> 2 4 bits

1 x y z 1 w v u 1 0 a b c ,

=> . (Sign Extension) bits, . bits, bits , bits. bits bits . 2, n bits n + m bits, (MS bit) n-bit m m MS bits. : 3 4 bits 0011. 8 bits 4 bits bit ( 0) => 00000011. 3 2 4 bits 1101. 8 bits 4 bits bit ( 1) => 11111101. / : .

2.7.1 , . XYZ,ABC 2 : X * 22 + Y * 21 + Z * 20 + A * 2-1 + B * 2-2 + C * 2-3 . 101,100 = 1 * 22 + 1 * 20 + 1 * 2-1 = 4 + 1 + = 5,5.

n bits m bits 2-m , 11..1,11..1 2-n-2-m. ..

() . , . , . .. 1.62510

1,625= 1 + 0,625 y0 = 1 ( ) 0,625 * 2 = 1,25 = 1 + 0,25 => y-1 = 1 (MS) => 1.101 0,25 * 2 = 0,5 = 0 + 0,5 => y-2 = 0 0,5 * 2 = 1,0 = 1 + 0,0 => y-3 =1 (LS)

(2 ) . (0 1 2) , () () bits , .

2.7.2 (Floating Point) * ABC 2,37*1011. . . .

Mantissa exponent m-bits n-bits

0.x-1 x-2 x-3 x-m . [-(1-2-m).. (1-2-m)] 2-m. 2-m * exponent () . , . ( ) (X/X) . , . .

1.0000 = 1.0101.0010 = 1.1/8 = 1.125 1.0001 = 1.1/16 = 1.0625

format 32 Bit 8 Bit 24 bits . (x-1) - ( 1 ). . : 2-100 32 bits : 0,0000...1 100 , 32, . , m = 24, n = 8, 2-100 = 0,1 * 2-99 . 0,1 , 99 8 bits, 2-100 . 17,687510 : 1710 => 100012 0,6875 * 2 = 1,375 => 1 0,375 * 2 = 0,75 => 0 => 17,687510 = 10001,10112 0,75 * 2 = 1,5 => 1 0,5 * 2 = 1,0 => 1 : ( 5 ): 17,6875 = 10001,1011 = 0,100011011 * 25

: = 0,100011011 = 510= 0001012 0,062510 : 0,0625 * 2 = 0,125 => 0 0,125 * 2 = 0,25 => 0 => 0,062510 = 0,00012 0,25 * 2 = 0,5 => 0 0,5 * 2 = 1,0 => 1 : ( 3 ) 0,0625 = 0,0001 = 0,1 * 2-3 : = 0,1 = -310= 0000112

ASCII ASCII (= American Standard Code for Information Interchange) 7-Bit, (telex), . 7-Bit, bytes , 8-Bit (256 ), . ASCII

, 3 3 ( 0000111) 51 ( 1110111). (control characters) 0-31, . 10 16 .

ASCII

10 16 ASCII

0 00 Ctrl-@ NUL null 64 40 @

1 01 Ctrl-A SOH start of heading

65 41 A

2 02 Ctrl-B STX start of text 66 42 B

3 03 Ctrl-C ETX end of text 67 43 C

4 04 Ctrl-D EOT end of transmission

68 44 D

5 05 Ctrl-E ENQ enquiry 69 45 E

6 06 Ctrl-F ACK acknowledge 70 46 F

7 07 Ctrl-G BEL bell 71 47 G

8 08 Ctrl-H BS backspace 72 48 H

9 09 Ctrl-I HT horizontal tab 73 49 I

10 0A Ctrl-J LF new line 74 4A J

11 0B Ctrl-K VT vertical tab 75 4B K

12 OC Ctrl-L FF form feed 76 4C L

13 0D Ctrl-M CR carriage return 77 4D M

14 0E Ctrl-N SO shift out 78 4E N

15 0F Ctrl-O SI shift in 79 4F O

16 10 Ctrl-P DLE data link escape

80 50 P

17 11 Ctrl-Q DC1 device ctrl 1 81 51 Q

18 12 Ctrl-R DC2 device ctrl 2 82 52 R

19 13 Ctrl-S DC3 device ctrl 3 83 53 S

20 14 Ctrl-T DC4 device ctrl 4 84 54 T

21 15 Ctrl-U NAK negative acknowledge

85 55 U

22 16 Ctrl-V SYN synchronous idle

86 56 V

23 17 Ctrl-W ETB end of transmission block

87 57 W

24 18 Ctrl-X CAN cancel 88 58 X

25 19 Ctrl-Y EM end of medium 89 59 Y

26 1A Ctrl-Z SUB substitute 90 5A Z

27 1B Ctrl-[ ESC escape 91 5B [

28 1C Ctrl-\ FS file separator 92 5C \

29 1D Ctrl-] GS group separator

93 5D ]

30 1E Ctrl-^ RS record separator

94 5E ^

31 1F Ctrl-_ US unit separator 95 5F _

32 20 SP digit select 96 60 `

33 21 ! 97 61 a

34 22 " 98 62 b

35 23 # 99 63 c

36 24 $ 100 64 d

37 25 % 101 65 e

38 26 & 102 66 f

39 27 ' 103 67 g

40 28 ( 104 68 h

41 29 ) 105 69 i

42 2A * 106 6A j

43 2B + 107 6B k

44 2C , 108 6C l

45 2D - 109 6D m

46 2E . 110 6E n

47 2F / 111 6F o

48 30 0 112 70 p

49 31 1 113 71 q

50 32 2 114 72 r

51 33 3 115 73 s

52 34 4 116 74 t

53 35 5 117 75 u

54 36 6 118 76 v

55 37 7 119 77 w

56 38 8 120 78 x

57 39 9 121 79 y

58 3A : 122 7A z

59 3B ; 123 7B {

60 3C < 124 7C |

61 3D = 125 7D }

62 3E > 126 7E ~

63 3F ? 127 7F DEL

BCD , (.. ) BCD Binary Coded Decimal. bits 0 9. ( HEX -F) BCD . BCD : 1910 = 000100112 = 0001 1001BCD , BCD , 1001 0000. 0000 1001 0001 0000 .

3. , (non restoring, restoring)

.

( 0 , 0 1 ), ,

, .

, , 12.3 0.456 ( 56088), , 5.6088. n bits 2n bits. . , , ( ) n bits , (floating point). , ,T ( 2 bits bits ). (unsigned) bits , 2 bits. bits, ,, bits ,. bit MSB bit 0 LSB. flip-flop ( ) +1 bit ( ). . ## (concatenation) MSB .

, ; = 0 ; = 0 ; = 0 ; For (i =1 ; i > 1 ; , MSB 0

= 0 ## ( >> 1) ; , ; MSB LSB = ## ( >> 1) ; , ; MSB =0 ; }

4-bit (=4) i 1101 1011 =13, =11 1101 1011 0 0000 0000 ,, 1101 1011 0 1101 0000 1 1 , 0=1 1101 0101 0 1101 0000 1 1101 0101 0 1101 1000 1 , 3 = 01101 0101 0 0110 1000 1 , 1101 0101 1 0011 1000 2 2 , 0=1 1101 0010 1 0011 1000 2 1101 0010 1 0011 1100 2 , 3 = 0 1101 0010 0 1001 1100 2 , 1101 0010 0 1001 1100 3 3 , 0=0 1101 0001 0 1001 1100 3 1101 0001 0 1001 1110 3 , 3 = 0 1101 0001 0 0100 1110 3 , 1101 0001 1 0001 1110 4 4 , 0=1 1101 0000 1 0001 1110 4 1101 0000 1 0001 1111 4 , 3 = 0 1101 0000 0 1000 1111 4 , , ## = 143 Booth Booth ( weighted binary) 1, 2, 1. , ( 4-bit )

0001 = 0010 0001 0011 = 0100 0001 0111 = 1000 0001 1111 = 10000 0001 (: 5 bit )

, ,T ( 2 bits bits ). (unsigned) bits , 2 bits. bits, ,, bits . bit MSB bit 0 LSB. flip-flop ( ) +1 bit / ( ) flip-flop 0 bits 0 1 1 0 (: bits +1 ). Booth . ## (concatenation)

MSB . ( 0 10 01), , .

, ; = 0 ; = 0 ; = 0 ; M = 0 ; For (i = 0 ; i > 1 ; - , MSB 0

= 0 ## ( >> 1) ; , ; MSB LSB = ## ( >> 1) ; , ; MSB } }

4-bit (=4)

0 i 1101 1011 1 =13, =11 1101 1011 1 0 0 0000 0000 ,,, 1101 1011 1 0 1 0011 0000 1 1 , 0 ## = 10 1101 0101 1 1 1 0011 0000 1 , = 0 1101 0101 1 1 1 0011 1000 1 , 3 = 0 1101 0101 1 1 1 1001 1000 1 , 1101 0101 1 1 1 1001 1000 2 2 , 0 ## = 11

1101 0010 0 1 1 1001 1000 2 , = 0 1101 0010 0 1 1 1001 1100 2 , 3 = 0 1101 0010 0 1 1 1100 1100 2 , 1101 0010 0 1 0 1001 1100 3 3 , 0 ## = 01

1101 0001 1 0 0 1001 1100 3 , = 0 1101 0001 1 0 0 1001 1110 3 , 3 = 0 1101 0001 1 0 0 0100 1110 3 , 1101 0001 1 0 1 0111 1110 4 4 , 0 ## = 10 1101 0000 0 1 1 0111 1110 4 , = 0 1101 0000 0 1 1 0111 1111 4 , 3 = 0 1101 0000 0 1 1 1011 1111 4 , 1101 0001 0 1 1 1000 1111 5 5 , 0 ## = 01

, ## = 143

: bits ( 0 ), bits +1 , +1 . (MSB) bits . (unsigned) flip-flop. ( XOR) (.. 2s complement). , , Booth , 2s complement n bits 2n+1 , , , . Wallace, Dadda , , . full adders . Wallace Dadda.

3.2.1 (Restoring Division)

, , ( 10/3;). , , ,, 32-bit , > , ,,, . 16-bit ( 32-bit MIPS ), . = + . O : = ( ) - ( ) + 1. . 1 MSB 0 MSB

, flip-flop . , 1 . ## n + 1 bits. ( n-bit):

, MSB MSB ;

= n- ; ( ) 1 , MSB MSB ; 0 If ( = = 0) then { }

else { = n- ; ( ) 1 = - + 1 ; = 0 ; For (i =1 ; i

(= borrow) bit () i - 001101 000011 =13, =3, - 1101|00 000011 , =6-2=4 - 1101|00 110000 , =6-4=2 - 1101|00 110000 =-+1=3- 1101|00 110000 000000 0 0001|00 110000 000000 1 =-, =0 ( ) - 0001|00 110000 00000|1 1 - > 0 1 - 001|000 110000 00000|1 1 1 011|000 110000 00000|1 2 , =-, =1 - 001|000 110000 00000|1 2 - < 0 (=+)... - 001|000 110000 0000|10 2 ... - 01|0000 110000 0000|10 2 1 10|0000 110000 0000|10 3 (, =3) , =-,=1 - 01|0000 110000 0000|10 3 - < 0 (=+)... - 01|0000 110000 000|100 3 ... - 01|0000 110000 000|100 3 ( .) 100 (=4) 01 (=1), 13 = 3 4 + 1. ( MSB ).

3.2.3 (Non-Restoring Division) , , : 2 ( ). (. ) /2. 0 ( ) /2 = /2 (. ).

3.2.4 ( XOR ).

4 Floating Point

4.2 : , , 232 = 0.234. , . , , mantissa. , , , (alignment) . (MSB) Bit mantissa . , 2, ( 2) 1 ( ). , . , , mantissa 1 , ( ), 24 Bits mantissa 25 bits mantissa ( 1 ). MSB mantissa. (Alignment) mantissa 1 , , mantissa . ( ) ; - . - . , , NaN (Not a Number), +Inf, -Inf (+-infinity), : x/0 => NaN , +x/~0 => +inf, -x/~0 => -inf, ..

4.3 / ( ). , , . : 17,687510 + 0,062510 , 17,687510 = 0,100011011 * 25 0,062510 = 0,1 * 2-3

1: : || (0,062510) :

0,1* 2-3 = 0,01 * 2-2 = 0,001 * 2-1 = ... = 0,00000001 * 25 2: mantissas 3: ( ): . : 17,687510 1710 , 17,687510 = 0,100011011 * 25 1710 = 0,10001 * 25 1: : (5). 2: mantissas 3: ( ): 0,000001011 * 25 = 0,00001011 * 24 = ... = 0, 1011 * 20

4.4 , . mantissa, , , , AEX X BEY= (AXB)E(X+Y)

4.5

, mantissa .

0,100011011 * 25 0,000000001 * 25 0,100011100 * 25 = 10001,11 = 17 10 = 17,7510

0,100011011 * 25-0,100010000 * 25 0,000001011 * 25 = 0,1011 = 0687510

5 , , ,

5.1 , : array[100]; ( ) I.A. (initial address). array[i]; : address = I.A. + (i * sizeof(array element)) , array[I] : address = I.A. + i * 4 (char) : address = I.A. + i * 1 : array[nrows,ncolumns]; ( array[0,0]) I.A. (initial address). array[j,i]; : address = I.A. + (j * ncolumns * sizeof(array element)) + (i * sizeof(array element)) (j * ) bytes , (i * ) . int array[50, 100], array[i, j] : address = I.A. + j * 100 * 4 + i * 4 (char) : address = I.A. + j * 100 * 1 + i * 1

A[0]

A[1]

A[i]

I.A.

I.A. + 4

I.A. + i * 4

int array[100]

A[99] I.A. + 99 * 4

I.A.I.A. + 4

I.A. + 99 * 4

int array[50,100]

I.A. + (49 * 100 + 99) * 4

I.A. + 100 * 4

I.A. + (j * 100 + i) * 4

A[0,0]

MNHMH

A[0,1]

A[0,99] A[1,0]

A[i,j]

A[49,99]

MNHMH

6 , Assembly,

Assembler

6.1 0 1. .

6.2 Assembly 50 ( assembler) , . , (.. ) (.. JUMP) . assembly, assembly assembler .

6.3 Assembler assembler assembly , , ( macros) , , .

6.4 Assembler , . MIPS .. , . , , ([ ]) .text [addr] . , . .data [addr] . , , ( text), ( data). , , .

; , . , , ! , . .text .data . , . : .text add $9, $8, $7 .data s1: .ascii string1 .text ori ... beq ... .data s2: .ascii string2

.text add $9, $8, $7 ... ori ... beq ... .data s1: .ascii string1 s2: .ascii string2

word w1 [,, wn] n w1, , wn. .half h1 [,, hn] n 16-bit (short) h1, , hn. .byte b1 [,, bn] n bytes b1, , bn. .ascii str strlen(str) bytes Ascii . .asciiz str .ascii ( C) .space n n bytes ( ) .align m / 2n. (.align 2 => / 4).

.globl , . :

,

(, ..)

( /, , .. printf)

, .

: .

: . ( ). .

SPIM (menu Simulator->Display Symbol Table)

MIPS MIPS . :

$zero $0 zero $at $1 assembler temporary register $v0, $v1 $2, $3 expression evaluation and function result $a0..$a3 $4..$7 procedure arguments $t0..$t7 $8..$15 temporary $s0..$s7 $16..$23 saved temporaries $t8, $t9 $24, $25 temporary $gp $28 global pointer $sp $29 stack pointer $fp $30 frame pointer $ra $31 return address (from subroutine call)

:

$at .

$v0, $v1 (functions)

$a0..$a3 (procedures & functions)

$sp $fp stack pointer frame pointer .

$ra (return address)

$gp (global pointer) . , lw offset $gp .

$gp

$t0..$t9 (temporary) . , .

$s0..$s7 saved .

$t0..$t9 caller-save, $s0..$s7 callee-save.

SPIM (SPIM System Calls)

SPIM (system calls).

Spim system calls: / , , / , (malloc) .

: $v0 ($2) ( ), (..

) $a0 ($4) syscall $v0

$v0 : 1 2 (float) 3 (double) 4 5 6 (float) 7 (double)

my_var

i

j

loop_index

0x40000

0x40004

0x40008

0x42000

0x40000 $gp

lw $t1, loop_index : lw $t1, 0x2000($gp) : lui $at, 0x4 lw, $t1, 0x2000($at)

8 9 10 SPIM System Calls:

: li $v0, 4 # print string la $a0, str # str is the strings label syscall

: li $v0, 1 # print integer la $a0, 1500 # integer to print syscall

: li $v0, 5 # read integer syscall move $t0, $a0 # read value is in $a0

7 (

- Instruction Set Architecture ISA)

7.1 (Instruction Set Architecture) , , (.. ADD $1,$2,$3 $2 $3 $1). RTL (Register Transfer Language). , RTL ADD $1 $2 + $3. , ISA , .. (flags) ( ), , . ISA 1960 IBM 360. , , , , . , IBM 360/85 (cache), 360/91 , . ISA , . IS o MIPS ( ), o SPARC, DEC Alpha, o IA-64 ( ).

7.2 MIPS MIPS 32-bit , ( ) e;inai 32 Bits. 2 byte, halfword, word, ., ( ) , . ( 1960) CDC 6600 60 Bits. MIPS :

(words) 32 bits 32 32 bits ( ) 32 :

$0 - $31 ( $ + ) : $zero, $at, $t0, $sp, $ra ($0 - $31).

$0 0 () (Program Counter => PC)

32 bits load ()

store (), ( 32 bits). byte (8 bits).

0, 4, ...

,

,

, (branch, jump)

PC .

32 bits (1 ), ( 4)

, PC 4

7.2.1 Format MIPS

3 format MIPS:

R-type (Register)

(1 2 ). I-type (Immediate)

(16 bit).

J-type (Jump) jump.

:

op 6 bits rt 5 bits No 2/ rs 5 bits No 1 rd 5 bits No shmt 5 bits No bits func 6 bits R-type immed 16 bits I-type disp 26 bits J-type

7.3 MIPS MIPS R,I, J : R-type: add, sub

add rd, rs, rt : add $1, $2, $3

Functionality RF[rd] = RF[rs] + RF[rt] , /

sub rd, rs, rt : sub $1, $2, $3 Functionality

RF[rd] = RF[rs] - RF[rt] , /

I-type: addi, subi

addi rt, rs, Immed16 - : addi $1, $2, 100 Functionality

RF[rt] = RF[rs] + SignExtend32(Immed16) , /

: subi. (-) addi

R-type: or, and

Bitwise : (and, or, xor, ...) bits , bits.

or rd, rs, rt : or $1, $2, $3 Functionality

RF[rd] = RF[rs] | RF[rt] and rd, rs, rt

: and $1, $2, $3 Functionality

RF[rd] = RF[rs] & RF[rt] I-type: ori, andi

ori rt, rs, Immed16 - : ori $1, $2, 100 Functionality

RF[rt] = RF[rs] | ZeroExtend32(Immed16) andi rt, rs, Immed16 -

: subi $1, $2, 100 Functionality

RF[rt] = RF[rs] & ZeroExtend32(Immed16) R-type: xor, nor

xor rd, rs, rt XOR : xor $1, $2, $3 Functionality

RF[rd] = RF[rs] ^ RF[rt] nor rd, rs, rt NOR

: and $1, $2, $3 Functionality

RF[rd] = ! ( RF[rs] | RF[rt]) I-type: xori

xori rt, rs, Immed16 XOR - : xori $1, $2, 100 Functionality

RF[rt] = RF[rs] ^ ZeroExtend32(Immed16) R-type: addu, subu (unsigned)

addu rd , rs, rt - : addu $1, $2, $3 Functionality

RF[rd] = RF[rs] + RF[rt] addu

/ subu rd, rs, rt -

: subu $1, $2, $3 Functionality

RF[rd] = RF[rs] - RF[rt] subu

/ I-type: addui, subui

addiu rt, rs, Immed16 - : addi $1, $2, 100 Functionality

RF[rt] = RF[rs] + SignExtend32(Immed16) addi addiu

, / subiu rt, rs, Immed16 -

: subi $1, $2, 100 Functionality

RF[rt] = RF[rs] - SignExtend32(Immed16) addi addiu

, / R-type: sll (shift left logical)

sll rd, rt, shamt : sll $1, $2, 5 Functionality

RF[rd] = LowOrderZeroFill32(RF[rt]

: srl $1, $2, 5 Functionality

RF[rd] = ZeroFill32(RF[rt] >> shamt) :

00110001110101010101010100010101 >> 5 00000001100011101010101010101000 10101

5 bits , 5 bits 0.

R-type: sra (shift right arithmetic) srl rd, rt, shamt

: srl $1, $2, 5 Functionality

RF[rd] = SignExtend32(RF[rt] >> shamt) :

2 :

00110001110101010101010100010101 >> 5 => 00000001100011101010101010101000 10101

5 bits , 5 bits bit.

10110001110101010101010100010101 >> 5 => 11111101100011101010101010101000 10101

5 bits , 5 bits bit

R-type: srlv, srav (shift right log/arithmetic variable)

srlv rd, rt, rs (shift right logical variable)

: srlv $1, $2, $3 Functionality: ( srl

) RF[rd] = ZeroFill32(RF[rt] >> RF[rs])

srav rd, rt, rs (shift right arithmetic variable)

: srav $1, $2, $3 Functionality: ( sra

) RF[rd] = SignExtend32(RF[rt] >> RF[rs])

I-type: lui (load upper immediate)

lui rt, Immed16 16 bits : lui $1, 0x100 Functionality

RF[rt] = LowOrderZeroFill32(Immed16 $1 = 0x01000000 :

0000 0100 0000 0000 0000 0000 0000 0000

R-type: slt, sltu (set less-than) slt rd, rt, rs

: slt $1, $2, $3 Functionality

/* */ if (RF[rt]

: 16-bit offset . offset , .

Functionality nextPC = PC + SignExtend32(Offset16

I-type: blez (branch less than or equal to zero)

blez rs, Offset16

: blez $1, 100 : blez bgez ,

To offset (+/-)

. Functionality

nextPC = PC + SignExtend32(Offset16

jal disp26 ( )

: jal 10000 To disp (

). Functionality

RF[31] = ( jal, . PC + 4) PC = PC31-28 || (disp16

assembler 1-2 , . , MIPS SUBI (Subtract Immediate) assembler SUBI $X,$Y,K 16-Bit , 2s complement ( L), ADDI, $X,$Y,L. . :

move, . addu rd, rs, 0

li (load immediate), 32 bits: li $2, Immediate. 16 bits, li ori. 16 bits, li : lui 16 bits ori 16 bits.

MIPS, , $1 ($at = Assembler Temporary) , : move rd, rs ( )

: move $16, $23 Functionality: RF[rd] = RF[rs] addu rd, rs, 0

li Constant ( )

: li rd,1000000 Functionality: RF[rd] = Constant ori rd, Constant16 16 bits,

16 bits ( $1):

lui $1, MostSignificant16(Constant32) ori rd, $1, LeastSignificant16(Constant32) la rd, Constant(rs) ( )

: la $11, 1000000($8) Functionality: RF[rd] = Constant+RF[rs] addi rd, rs, Constant16 16 bits,

16 bits : li $1, Constant32 # ! add rd , rs, $1 la rd, Label ( )

: la $11, MyArray Functionality: RF[rd] = LabelValue li rd, Constant32

,

set-less-than (slt). b label ( )

: b loop1 Functionality: PC = AddressOf(label) beq $0, $0, label

bge rs, rt, label (. .) : bge $8, $7, loop1 Functionality: nextPC = PC + SignExtend32(Offset16 = RF[rt]) { PC = nextPC } else /* condition is false, just execute next instruction: */ PC = PC + 4 : slt $1, rs, rt beq $1, $0, label

: bgt (branch greater than) ble (branch less equal) blt (branch less than) . bgeu (branch greater or equal unsigned) bgtu (branch greater than unsigned) ble (branch less or equal unsigned) blt (branch less than unsigned) - . , : ble $8, 100, loop1. 16 bits :

slti $1, rs, Constant16 bne $1, $0, label

$1 .

8 Assembly # # ARY 101 Digital Computers, Spring 2002, Dionisios Pnevmatikatos # # LAB 1 : Simple program that prints a prompt, reads an integer # and prints the integer plus 4 on the screen # # is the comment character # .data .globl askint .globl repint askint: .asciiz "Type an integer : " repint: .asciiz "The new value is : " newline: .asciiz "/n" .text .globl main main: # Print the prompt li $v0, 4 # 4 is the code print string la $a0, askint # a0 is the string to be printed and gets the

# value from "variable" askint syscall # Read in the integer li $v0, 5 # 5 is the code for read integer syscall # result is placed in $v0 add $t0, $v0, 4 # add 4 to it and store the result in $t0 # Print the result string li $v0, 4 # 4 is the code for print string la $a0, repint # string to be printed is in "variable" askint syscall # Print the answer li $v0, 1 # 1 is the code for print integer move $a0, $t0 # a0 receives integer to be printed syscall # Print a newline li $v0, 4 # print string la $a0, newline # string to be printed is in "variable" newline syscall # Exit li $v0, 10 syscall

9 , ,

, Macros

, . assembly , .

: main() { A() { Line1; /* M1 */ Aline1; /* A1 */ A(); /* M2 */ Aline2; /* A2 */ Line2; /* M3 */ } A(); /* M4 */ Line3; /* M5 */ }

C : main Line1 /* M1 */ A Line 1 /* A1 */ A Line 2 /* A2 */ main Line2 /* M2 */ A Line 1 /* A1 */ A Line 2 /* A2 */ main Line3 /* M5 */

( , /* 1 */). , ! main Line2 /* M2 */, main Line3 /* M5 */.

Assembly MIPS

/ jal (jump and link) jr (jump register)

main: li $4, 1000 # M1 jal A # M2 A(), (M3) -> $31 li $4, 2000 # M3 jal A # M4 A(), (M5) -> $31 ori $5, $2, $9 # M5 A: addi $11, $12, $4 # A1 lw $2, 0($11) # A2 ori $2, $2, $13 # A3 jr $31 #

C C D, .

; 0 1, 2, ... .

: D, C,

, . ( -1 ... 0 main)

? (stack)!

Assembly

(stack pointer) $29

LIFO: Last-In, First-Out. : . : Push ( ), Pop

( )

(top) Top of Stack

100

33

-3706

100

33

: push(-3706)

Top of Stack

: pop

100

33 Top of Stack

: pop

100 Top of Stack

Push(x) ( $4) addi $29, $29, -4 # sw $4, 0($29) # Pop() ( $2) lw $2, 0($29) # addi $29, $29, 4 #

Push Pop

100

33

-3706

100

33

: push(-3706)

: pop

$2 -3706

100

33

: Pop

$2 33

100 0x4003fc

0x4003f8

0x4003fc

0x4003f8

0x4003f456 -3706

33

-3706 0x4003f4

0x4003fc

0x4003f8

0x4003f4

0x4003fc

0x4003f8

0x4003f4

-3706 $4

0x4003f8 $29 -3706

0x4003f4

-3706

0x4003f8

-3706

0x4003fc

$4

$29

$4

$29$4

$29

0 $2 0 -3706 -33 $2 $2 $2

10 , , . , , .. call by value, call by value-result, call by reference, ., assembly. caller-save callee-save :

(caller): caller-save

$a0-$a3 /

( ) Jal function caller-save

(callee) : : .

callee-save .

: / : callee-save

$ra caller-save,

, MIPS:

(return address), ( $ra = $31) $sp ( ).

callee-save ($s0-$s7).

callee-save, ( ), ( ), , .

, caller-save , .

MIPS, caller-save.

: caller-save $t0-$t9 $v0, $v1, $a0-$a3, $ra ( jal)

10.1 /

MIPS/SPIM Scalar (, bytes, ) $a0-$a3. -scalar (, , structures, ..), 4, . : $v0, $v1 ( => $v0) callee-save ($s0-$s7). callee-save, ( ), ( ), , . , caller-save , . MIPS, caller-save. : caller-save $t0-$t9 $v0, $v1, $a0-$a3, $ra ( jal).

10.2

:

: , . , . ( ), .

.

, , callee-save.

, , caller-save.

, , ( ) caller-save. , !

, , .

:

li X, 15 add X, X, $s6 lw Y, 40( X ) jal A li $t6, 37 jal B lw Y, $v0, Y

#1 ()

#2 ()

#1 ( => callee-save . saved registers)

li $t0, 15 add $t0, $t0, $s6 lw $s0, 40( $t0 ) jal A li $t0, 37 jal B lw $s0, $v0, $s0

X => $t0 Y => $s0

11 , . . # # ARY 101 Digital Computers, Spring 2002, Dionisios Pnevmatikatos # # Paradeigma xrhshs anadromhs kai xrhshs ths stoibas # # Ypologismos toy n! (n paragontiko) me anadromh: # factorial(n) = n * factorial(n-1) # kai arxikh synthikh: # factorial(0) = 1; # .data .globl askint .globl repint askint: .asciiz "Type an integer (max 13): " repint: .asciiz "The factorial is : " newline:.asciiz "\n" .text .globl main .globl factorial main: # H main DEN exei prologo afou den kaleitai apo allh synarthsh. # Epishs DEN xrhsimopoiei kanena saved register ($s0-7) # Print the prompt to ask for an integer li $v0, 4 # 4 is the code print string la $a0, askint # a0 is the string to be printed # and gets value from "variable" askint syscall # Read in the integer li $v0, 5 # 5 is the code for read integer syscall # result is placed in $v0 # To apotelesma brisketai ston kataxwrhth $v0 # antigrafh tou akeraiou pou molis diabasame ston kataxvrhth $a0 move $a0, $v0 # set the argument in $a0 jal factorial # antigrafh tou factorial(n) sto $t0 gia na # ton xrhsimopoihsoume argotera move $t0, $v0 # Ektypwsh tou string gia to apotelesma li $v0, 4 # 4 is the code for print string la $a0, repint # string to be printed is in "variable" askint syscall

# Ektypwsh tou apotelesmatos li $v0, 1 # 1 is the code for print integer move $a0, $t0 # a0 receives integer to be printed syscall # Print a newline li $v0, 4 # print integer la $a0, newline # string to be printed is in "variable" newline syscall # Exit li $v0, 10 syscall factorial: # Prologos: apothikeysh dieythynshs epistrofhs, kai tou orismatos # to opoio xreiazetai kai meta thn anadromikh klhsh ths factorial addu $sp, $sp, -8 sw $ra, 4($sp) # save return address sw $a0, 0($sp) # save argument (n) # Telos prologou bgtz $a0, greater_than_zero # If we reach here, the argument is zero, and fact(0) = 1. li $v0, 1 j epilogue greater_than_zero: sub $a0, $a0, 1 # call factorial(n-1) jal factorial # factorial(n-1) is in $v0 lw $v1, 0($sp) # restore n from stack mul $v0, $v0, $v1 # multiply n * factorial(n-1) # we are done, $v0 has the correct value epilogue: lw $ra, 4($sp) # Epanafora ths dieythynshs epistrofhs addiu $sp, $sp, 8 # Epanafora tou $sp sthn timh prin thn klhsh jr $ra

12 Interrupts, Exceptions, -

Traps , , , , () . , , . (.. ), (.. I/O), traps (.x. ). :

(interrupts & exceptions) :

( , , ..)

: , , .. ..

() interrupt handler,

12.1

add $t0, $s0, 14 a sub $t1, $t0, $s3 ori $t0, $t0, 13 lw $s6, 104($t0)

# Interrupt Handler mfc0 # status

register # rfe # Return From Exception

Interrupt Handler add sub,

:

/

. , ..

() . .

/

(.. , , ..)

( .) 12.2 , , . , block , , . , () : (User) (Kernel). . bit Kernel /User mode . , :

(interrupt handler) 12.3 , Vectored Interrupts interrupt handler. :

Vectored Interrupts:

interrupt handler. . (.. 80x86) (: )

interrupt handler interrupt handler.

interrupt handler . (.. MIPS) (: Vectored Interrupts)

Polling , Vectored Interrupts!

MIPS Cause register vector 12.4 MIPS MIPS :

0 (coprocessor 0) , .

.

$12 = Status register (processor mode, .) $13 = Cause register ( .) $14 = EPC (Exception PC) ( )

mfc0 (move from coprocessor

0) mtc0 (move to coprocessor 0) :

PC EPC Cause Register kernel 0x80000080

interrupt handler

( rfe: return from exception)

( EPC)

MIPS :

0 INT ( I/O) 1,2,3 4 ADDRL ( ) 5 ADDRS ( ) 6 IBUS Bus Error ( ) 7 DBUS Bus Error ( ) 8 SYSCALL 9 BKPT Breakpoint 10 RI Reserved Instruction ( ) 11 CPU 12 OVF

. cause status :

Cause register ($13)

Bits [6:2] = 5 bit

Bits [15:8] = 8 bit ( >=1 8)

bits . Status register ($12)

Bits user/kernel mode, interrupt enable ( , 8 bits interrupt enable ( Cause). bit 1 , .

12.5 . , .. , ( buffer). KHz , . , , , , interrupt handler , ( . , :

:

interrupt handler. interrupt handler

.

. Polling:

,

Polling! Cray (Cray 1, Cray X-MP, Cray 2, Cray Y-MP) , . (.. ) , ACKN (acknowledgement) . , , . ( Cray ) . 12.6 :

. , !

:

, . , (.. kernel) / . . , Intel x86 , . 12.7

, , . interrupt handler , . interrupt handler . , : () , () , () . ( ) .

Peripheral 1

Processor

Data

Instructions

Memory

RF STATUS

DATA

IntReq

CONTROL

12

1: 2: 3:

3

Read Data

Write Memory

(Direct Memory Access - DMA),

13 (Direct Memory Access - DMA) ( ) , . ( ). DMA , (source start address), (destination start address), . , (DMA) (DMA Controller), . , , . DMA controller bus interface. . DMA controller , Source Address, Destination Address, Byte Count ( Word Count). (status register) DMA, , , .

DMA DMA :

Peripheral 1

Processor

Data

Instructions

Memory

RF STATUS

DATA

CONTROL

1 23 Read Data Write Memory

DMA Controller

Dst Addr

Word Count

Src Addr

-

DMA,

, . DMA (

) , DMA

DMA ,

bus master

, DMA, (bus)

:

(Bus) =>

/ bus masters, DMA

;

(arbitration) master . master ,

bus-masters? : ..

DMA, Round-Robin:

DMA . . / , . , , () . 13.1 DMA CPU 100MHz ( 10 nsec). 1 lw 2 . 33% lw/sw ( ), lw sw. 1 , 2 ( , ). . . (DMA); : 9 , 2 lw, 1 sw 6 (add ..). : (6+1) * 1 + 2 (lw) * 2 = 11 = 110 nsec. 11 , 1 sw * 1 + 2 lw * 2 = 5 . 11 11 5 = 6 DMA.

, 2 + 1 = 3 . 11 DMA: 6 / 3 = 2 = 8 bytes. DMA 8 bytes 11 , 8 bytes / 110nsec = 72.727 bytes/sec. 13.2 DMA , (.. , ). DMA, . src dest address, word count, . 4 DMA ( , servers). DMA controller ; ( ). wait_time () . DMA controller status register (polling). DMA controller ! (mainframes) DMA controller . I/O Processor. I/O processors 1960, ( > 10 MBps) () . CDC 6600 , /. 13.3 / . , n X n (n+1) . ( stride). (adder) , . DMA controlers .

14 (Bootstrapping),

/ (Cold/Warm Start), BIOS, Multi-User, Multi-Tasking

; , , . . sec msec , , (, .). RESET, ( ) 0. RESET , Program Counter . RESET RC (time constant) (.. 100msec). RC , 1 RESET. RESET bootstrapping. , , .

14.1 H Bootstrapping RESET, Program Counter , . (hardware). , PC (Program Counter) ROM, . , ( ). ROM bootstrap ROM, PC ( Intel) address space 640 ( - 1). , . monitor, . PC ( ), ( floppy drive, , , ), , floppy drive ( ) . PC ( Windows) COMMAND.COM, , (.. interrupt table, , .).

bootstrapping ROM ( ROM ), hardware ( motherboard) software . floppy drive , , floppy disk boot . device drivers? , floppy , , , , (Non System Disk). format floppy system disk, (COMMAND.COM) floppy .

14.1 Bootstrapping, Device Drivers, bootstrapping . (.. MS-DOS) COMMAND.COM script (script PATH) . Unix (daemon - , .. , , .). script . device drivers ( device driver). (single user). (.. PC, PC-DOS/MS-DOS Windows virtual memory). multi-user .

14.2 Multi-User single user multi-user : (time slicing) . .

, exception . ( ) . (Program Counter, , , .) ( ). , , . , Program Counter , . .

14.3 Multi-Tasking, Multi-User, -Multi-Tasking ( interrupts TSR) multi-tasking. (multi-user) multi-tasking. Multi-tasking . ( PC) (.. ) interrupts. , interrupt service routines , . - Multi-tasking , (.. ).

14.4 / (Cold start/Warm start) . , . warm start Program Counter ( ) . cold start , ., . , , .. , , .

15 , , ( REQ/ACK, INT, .). ISA bus (8 16 Bit) , ( MEMR / MEMW ) / ( IOR/IOW ) . . ISA Bus : ISA us 8-bit ISABUS Pinout: AT I/0 CHANNEL (SYSTEM BUS) PINOUTS Pin Signal Description Direction* ------------------------------------------------------------------------------- A1 -I/0 CH CK I/0 channel check;active low=parity error In A2 SD7 Data bit 7 In/Out A3 SD6 Data bit 6 In/Out A4 SD5 Data bit 5 In/Out A5 SD4 Data bit 4 In/Out A6 SD3 Data bit 3 In/Out A7 SD2 Data bit 2 In/Out A8 SD1 Data bit 1 In/Out A9 SDO Data bit 0 In/Out A10 -I/0 CH RDY I/0 Channel ready; pulled low to lengthen memory cycles In Al1 AEN Address enable; active high when DMA controls bus out A12 SA19 Address bft 19 out A13 SA18 Address bit 18 out A14 SA17 Address bit 17 Out A15 SA16 Address bit 16 out A16 SA15 Address bit 15 out A17 SA14 Address bit 14 out A18 SA13 Address bit 13 Out A19 SA12 Address bit 12 Out A20 SA11 Address bit 11 Out A21 SA1O Address bit 10 out A22 SA9 Address bit 9 Out A23 SAS Address bit 8 Out A24 SA7 Address bit 7 Out A25 SA6 Address bit 6 out A26 SAS Address bit 5 Out A27 SA4 Address bit 4 Out A28 SA3 Address bit 3 Out A29 SA2 Address bit 2 Out A30 SA1 Address bit 1 out A31 SA0 Address bit 0 Out B1 GROUND B2 RESET DRV Active high lo reset or Initialize system logic out B3 +5Vdc B4 IRQ9 Interrupt request 9 In B5 -5Vdc B6 DRQ2 DMA request 2 In B7 -12Vdc

B8 -CARD SLCTD Card selected; activated by cards In XT's slot J8 In B9 +12Vdc B10 GROUND B11 -MEMW Memory write Out B12 -MEMR Memory read Out B13 -IOW I/O write In/Out B14 -IOR I/O read In/Out B15 -DACK3 DMA acknowledge 3 Out B16 DRQ3 DMA request 3 In B17 -DACK1 DMA acknowledge 1 Out B18 DRQ1 DMA request 1 In B19 -REFRESH Refresh In/Out B20 CLOCK System clock (67 ns,6 or 8MHz);50% duty cycle Out B21 IRQ7 Interrupt request 7 In B22 IRQ6 Interrupt request 6 In B23 IRQ5 Interrupt request 5 In B24 IRQ4 Intertupt request 4 In B25 IRQ3 Interrupt request 3 In B26 -DACK2 DMA acknowledge 2 Out B27 T/C Terminal count: pulses high when DMA term count reached Out B28 ALE Address latch enable Out B29 +5Vdc B30 OSC High-speed clock (70 ns, 14.31818Mhz),50%duty cycle Out B31 GROUND ISA 16-bit bus Pin Signal Description Direction* ------------------------------------------------------------------------------- 16-bit AT extension ------------------- C1 SBHE System bus high enable (data available on SD8-15) In/Out C2 LA23 Address bit 23 (unlatched) In/Out C3 LA22 Address bit 22 (unlatched) In/out C4 LA21 Address bit 21 (unlatched) In/Out C5 LA20 Address bit 20 (unlatched) In/Out C6 LA19 Address bit 19 (unlatched) In/Out C7 LA18 Address bit 18 (unlatched) In/Out C8 LA17 Address bit 17 (unlatched) In/Out C9 -MEMR Memory read (active on all memory read cycles) In/Out C10 -MEMW Memory write (active on all memory write cycles) In/Out C11 SD08 Data bit 8 In/Out C12 SD09 Data bit 9 In/Out C13 SD10 Data bit 10 In/Out C14 SD11 Data bit 11 In/Out C15 SD12 Data bit 12 In/Out C16 SD13 Data bit 13 In/Out C17 SD14 Data bit 14 In/Out C18 SD15 Data bit 15 In/Out D1 -MEM CS16 Memory 16-bit chip select (1 wait, 16-bit memory cycle) In D2 -I/O CSI6 I/O 16-bit chip select (1 wait, 16-bit I/O cycle) In D3 IRQ10 Interrupt request 10 In D4 IRQ11 Interrupt request 11 In D5 IRQ12 Interrupt request 12 In D6 IRQ15 Interrupt request 13 In D7 IRQ14 Interrupt request 14 In D8 -DACK0 DMA acknowledge 0 Out D9 DRQO DMA request 0 In D10 -DACK5 DMA acknowledge 5 Out D11 DRQ5 DMA request 5 In

D12 -DACK6 DMA acknowledge 6 Out D13 DRQ6 DMA request 6 In D14 -DACK7 DMA scknowledge 7 Out D15 DRQ7 DMA request 7 In D16 +5Vdc D17 -MASTER Used with DRQ to gain control of system In D18 Ground *-From system board Note:- All signals are at standard TTL levels. - Connector is a 62-pin edge connector with a secondary 36-pin edge connector. - A or C=component side of board; numbers start closest to rear panel of machine.

16 ( , ,

, , , .) :

/ :

: ,

(Status) :

(Data) :

( ) (Control) :

. :

: , 1 .

Processor

Data

Instructions Peripheral 1

Memory

I/O Bus (.. PCI)

Peripheral

RF STATUS DATA

STATUS

DATA

CONTROL CONTROL

: ( )

: 0 1 (LS) 3 bits

LED . (string)?

, . , , . 1, . ENTER

. Polling

16.1 , (/ address space), / , , ( write, store, . ) ( read, load, .). . / address space :

(I/O bus) .

.

.

, , . , /

(bus) (Memory aped I/O)

, pixels . Pixel ( ).

MIPS::

MIPS 232 . .

/ lw/sw.

, , polling interrupts

Polling , .

;

. , , -. !

, . ,

.. )

Interrupts , .

, :

! ?

! : (interrupts)

. interrupts .

!

, interrupts , interrupt Polling , interrupt interrupt . , interrupt . :

/

(Interrupt Request) .

() status register

, (interrupt handler) , ()

; =>

(interrupt controller)

interrupt handler

Peripheral

Peripheral 1

Processor

Data

Instructions

Memory

I/O Bus (PCI)

RF STATUS DATA

STATUS

DATA

IntReq 1

IntReq N

IntReq[1..N]

CONTROL CONTROL