Post on 26-Apr-2022
Topics in IC Design
T-Coil
Deog-Kyoon Jeong
dkjeong@snu.ac.kr
School of Electrical and Computer Engineering
Seoul National University
2020 Fall
(Compliment to Hyungrok Do)
Introduction
β’ Inductors produce peaking, thereby giving
bandwidth extension.
β’ T-coil (Tee-Coil) produces even more bandwidth
extension by giving negative inductance.
Β© 2020 DK Jeong Topics in IC Design 2
Dot conventionSame direction : k > 0
Opposite direction : k < 0
π = π€ ππππ|k| β€ 1
|k| = 1 when inductors share all of
their magnetic flux.
Introduction
β’ Introduced by Ginzton in 1948 as part of distributed
amplifier.
Β© 2020 DK Jeong Topics in IC Design 3
[0] Ginzton, Proc IRE, 1948
T-Coil
β’ Common Source Amplifier
Β© 2020 DK Jeong Topics in IC Design 4
πππ π© = Ξ€π ππ πΉπ«πͺπ³
Without T-Coil, 1
1 + π π π·πΆπΏ
With T-Coil,
[1] B. Razavi, ISSC Magazine, 2015
β’ When two zeros in the numerator are cancelled by two of the four
poles in the denominator, the second-order transfer function is
obtained.
β’ Given RD and CL, what are CB, L, and M, assuming L1 = L2 = L
(symmetric T-Coil)?
β’ Four equations must be satisfied with five variables (CB, L, M,
, ππ). Out of numerous solutions, what is the best transfer
function that maximizes the bandwidth?
Β© 2020 DK Jeong Topics in IC Design 5
Symmetric T-Coil
π4ππ2 = π2
π3ππ2 = π22ππ + π1
π2ππ2 = π2ππ
2 + π12ππ + 1
π1ππ2 = π1ππ
2 + 2ππ
Symmetric T-Coil
β’ Let k=M/L and simplify 4 equations.
Β© 2020 DK Jeong Topics in IC Design 6
2
2
1 1
4 1
12
1
2
1
1
2 1
B
L
L B
D
n
L
D L D
L
C k
C k
k LkC C
k R
k LC
R C k L R
k LC
2
2
2
2
2
22
2 2
1 44
4 1
4 1
16
16
D L
LB
n
D L
R CL
k
CC
R C
β’ Then, determine that maximizes the bw.
[1] B. Razavi, ISSC Magazine, 2015
Symmetric T-Coil
β’ With the following 2nd order transfer function,
β’ 3-dB BW with T-Coil is
which is maximized when .
β’ Then
Β© 2020 DK Jeong Topics in IC Design 7
22 2 2 2
,
22
2 2
2 2
1 2 1 2 1
161 2 1 2 1
BW T Coil n
D LR C
,
3
12 2
2.828
BW T Coil n
D L
dB
R C
[1] B. Razavi, ISSC Magazine, 2015
β’ The maximum bandwidth solution is
πΏ =3
8π π·2πΆπΏ , π =
1
3πΏ, πΆπ΅ =
1
8πΆπΏ, ππ=2 2/π π·πΆπΏ
which extends the bandwidth by 2.828.
Topics in IC Design 8
Symmetric T-Coil
Β© 2020 DK Jeong
BWER=2.828
β’ What are its input impedances Zin1 and Zin2?
Β© 2020 DK Jeong Topics in IC Design 9
Features of Symmetric T-Coil
Zin1
Under the maximum bandwidth
condition,
Zin1 = RD
Zin2 =
T-Coil is transparent.
CL is not seen.
Can be used for return loss (RL)
minimization.
Zin2
β’ What is the transfer function to the resistor node?
Topics in IC Design 10
Features of Symmetric T-Coil
VR
β’ Under the maximum bandwidth
condition,
β’ All-pass function with infinite
bandwidth!
β’ Extra phase delay could be a
problem.
ππ πππ
π = βπππ π·π 2 β 2πππ + ππ
2
π 2 + 2πππ + ππ2
Β© 2020 DK Jeong
ββ π = β2 arctan[2πππ
ππ2 β π2
]
β’ With one less constraint (L1L2), more freedom for
design is utilized to extend the bandwidth at the cost
of higher design complexity.
β’ Given RD and CL, what are CB, L1, L2 , and M?
β’ Four equations must be satisfied with five variables
(CB, L1, L2 , M, ππ, and = Ξ€π π). Out of numerous
solutions, what is the best transfer function that
maximizes the bandwidth, πππ π©,π»βπͺπππ?
Topics in IC Design 11
Asymmetric T-Coil
π4ππ2 = π2
π3ππ2 = π22ππ + π1
π2ππ2 = π2ππ
2 + π12ππ + 1
π1ππ2 = π1ππ
2 + 2ππ
Β© 2020 DK Jeong
Asymmetric T-Coil
β’ No closed-form analytical solution was found.
β’ So, first assume L1=L, L2=bL, M= mL, with constraint
of the coupling coefficient
Topics in IC Design 12
π =π
πΏ1πΏ2=
π
π< 1
Β© 2020 DK Jeong
[3] S.C.D.Roy, IETE Journal of Research, 2016
Asymmetric T-Coil
β’ b=1 (Symmetric T-Coil)
β’ b=1, m=0.333 (k=0.333), π³ = π. ππππΉπ«ππͺπ³, πͺπ© = π. ππππͺπ³, ππ= 2. πππ/πΉπ«πͺπ³
β’ b<1, what are m(k), π³, πͺπ©, ππ? (using Mathematica)
Topics in IC Design 13
b=1.0, m= 0.333 (k=0.333), π³ = 0.375πΉπ«ππͺπ³, πͺπ© = 0.1250πͺπ³, ππ= 2.828/πΉπ«πͺπ³
b=0.9, m= 0.378 (k=0.398), π³ = 0.406πΉπ«ππͺπ³, πͺπ© = 0.1074πͺπ³, ππ= 2.939/πΉπ«πͺπ³
b=0.8, m= 0.412 (k=0.460), π³ = 0.44ππΉπ«ππͺπ³, πͺπ© = 0.091ππͺπ³, ππ= 3.062/πΉπ«πͺπ³
b=0.7, m= 0.436 (k=0.521), π³ = 0.49ππΉπ«ππͺπ³, πͺπ© = 0.077ππͺπ³, ππ= 3.202/πΉπ«πͺπ³
b=0.6, m= 0.449 (k=0.580), π³ = 0.55ππΉπ«ππͺπ³, πͺπ© = 0.063ππͺπ³, ππ= 3.367/πΉπ«πͺπ³
b=0.5, m= 0.451 (k=0.638), π³ = 0.635πΉπ«ππͺπ³, πͺπ© = 0.051ππͺπ³, ππ= 3.572/πΉπ«πͺπ³
b=0.4, m= 0.440 (k=0.696), π³ = 0.751πΉπ«ππͺπ³, πͺπ© = 0.0396πͺπ³, ππ= 3.838/πΉπ«πͺπ³
b=0.3, m= 0.414 (k=0.756), π³ = 0.93ππΉπ«ππͺπ³, πͺπ© = 0.0284πͺπ³, ππ= 4.215/πΉπ«πͺπ³
b=0.2, m= 0.366 (k=0.818), π³ = 1.25ππΉπ«ππͺπ³, πͺπ© = 0.017ππͺπ³, ππ= 4.828/πΉπ«πͺπ³
b=0.1, m= 0.280 (k=0.886), π³ = 2.02ππΉπ«ππͺπ³, πͺπ© = 0.007ππͺπ³, ππ= 6.176/πΉπ«πͺπ³
Β© 2020 DK Jeong
Practical Implementation
β’ Coupling coefficient of greater than 0.7 is not
practical with on-chip spiral inductor.
β’ So, b=0.4, m= 0.440 (k=0.696), π³ = 0.751πΉπ«ππͺπ³, πͺπ© =
0.0396πͺπ³, ππ= 3.838/πΉπ«πͺπ³ is the practical limit.
Topics in IC Design 14Β© 2020 DK Jeong
[3] S.C.D.Roy, IETE Journal of Research, 2016
Output at Resistor Load
With asymmetric T-coil and =Ξ€π π,
1) transfer function to RD?
2) impedance seen from either
side of the T-Coil?
Zin1 = ?
Zin2 = ?
Β© 2020 DK Jeong Topics in IC Design 15
VR
Zin1
Zin2
π½πΉπ½ππ
π = ?
T-Coil Design Flow
β’ Design flow
β For given CL and RD, determine L1, L2, k, and CB.
β Design T-coil in a 3-D EM tool and extract S-parameter or circuit model.
β Perform circuit simulation including parasitic resistance and capacitance.
β’ Parasitic RC
β If using top metal, a 100 pH of inductor has series resistance of 5 ~ 10 .
β Natural bridge capacitance is known to be 10 ~ 30 fF.
β’ Realistic limitation
β k canβt be over +0.7 in the chip.
β Self-resonance limits large k and L.
Β© 2020 DK Jeong Topics in IC Design 16
Eye Diagram Optimization
β’ Maximally Flat Gain ( = 1/β2) vs Maximally Flat Phase Delay ( = 1)
β’ Minimum Jitter Condition: Minimum phase delay variation
Β© 2020 DK Jeong Topics in IC Design 17
[4] W Bae, TVLSI, 2017
Asymmetric T-Coil Simulation
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Ξ· = 3.04 as expected
Gain:
No T-coil
T-coil 1
T-coil 2
Phase delay:
No T-coil
T-coil 1
T-coil 2
CL = 200 fF, RT = 50
(BW = 15.92 GHz)
ΞΆ = 1/β2, k = 0.45
L = 219 pH, b = 0.815
CB = 18.74 fF
Two T-coils :
1. Maximally flat gain @ k = 0.45
2. Maximally flat phase delay
around 1. (L = 200 pH)
Asymmetric T-Coil Simulation
Β© 2020 DK Jeong Topics in IC Design 19
CL = 200 fF, RT = 50
(BW = 15.92 GHz)
ΞΆ = 1/β2, k = 0.45
L = 219 pH, b = 0.815
CB = 18.74 fF
Two T-coils :
1. Maximally flat gain @ k = 0.45
2. Maximally flat phase delay
around 1. (L = 200 pH)
No T-coil T-coil 1 T-coil 2
Return Loss Reduction
β’ Minimize Return Loss at TX driver and RX receiver.
Β© 2020 DK Jeong Topics in IC Design 20
β’ Effect of Large ESD Capacitance is removed.
[5] M.Kossel, JSSC, 2008
[6] M.S.Keel, EOS/ESD, 2015
TX Optimization
Β© 2020 DK Jeong Topics in IC Design 21
Cp 200 fF
Ct 50 fF
Ce 100 fF
RT, Z0 50 Ξ©
No T-coil k = 0.5, L = 200 pH, b = 0.3
Z0CpbLL
Ce
Cc
CtRT
Channel
Vin
Vout
Zout
k = -0.25, L = 250 pH, b = 0.4
56Gb/s eye diagram
Example: ESD Diode Isolation
Β© 2020 DK Jeong Topics in IC Design 22
[7] J.Kim, ISSCC, 2015
Example: ESD Separation
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[8] C.Y.Lin, IEEE Transactions on Electron Devices. 2013
Example: Double T-Coil
Β© 2020 DK Jeong Topics in IC Design 24
[9] G.Steffan, ISSCC, 2017
Example: Coil with 4 ports
Β© 2020 DK Jeong Topics in IC Design 25
[10] J Kim, JSSC, 2019
References
26Topics in IC DesignΒ© 2020 DK Jeong
[0] E. Ginzton et. al, βDistributed Amplification,β Proc. IRE, vol. 36, pp. 956β969, Aug.
1948.
[1] Razavi, Behzad, "The bridged T-coil [a circuit for all seasons]." IEEE Solid-State
Circuits Magazine 7.4 (2015): 9-13.
[2] Paramesh, Jeyanandh, and David J. Allstot. "Analysis of the bridged T-coil circuit
using the extra-element theorem." IEEE Transactions on Circuits and Systems II:
Express Briefs 53.12 (2006): 1408-1412.
[3] Dutta Roy, Suhash C. "A Theoretical Investigation into the Limits of Bandwidth
Enhancement with the Asymmetrical Bridged T-Coil Network." IETE Journal of
Research 62.3 (2016): 379-386.
[4] Bae, Woorham, Borivoje NikoliΔ, and Deog-Kyoon Jeong. "Use of phase delay
analysis for evaluating wideband circuits: An alternative to group delay analysis."
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25.12 (2017):
3543-3547.
[5] Kossel, Marcel, et al. "A T-Coil-Enhanced 8.5 Gb/s High-Swing SST Transmitter in
65 nm Bulk CMOS With βͺ-16 dB Return Loss Over 10 GHz Bandwidth." IEEE
Journal of Solid-State Circuits 43.12 (2008): 2905-2920.
[6] Keel, Min-Sun, and Elyse Rosenbaum. "CDM-reliable T-coil techniques for high-
speed wireline receivers." 2015 37th Electrical Overstress/Electrostatic Discharge
Symposium (EOS/ESD). IEEE, 2015.
References
27Topics in IC DesignΒ© 2020 DK Jeong
[7] Kim, Jihwan, et al. "3.5 A 16-to-40Gb/s quarter-rate NRZ/PAM4 dual-mode
transmitter in 14nm CMOS." 2015 IEEE International Solid-State Circuits
Conference-(ISSCC) Digest of Technical Papers. IEEE, 2015.
[8] Lin, Chun-Yu, Li-Wei Chu, and Ming-Dou Ker. "Robust ESD protection design for
40-Gb/s transceiver in 65-nm CMOS process." IEEE transactions on electron
devices 60.11 (2013): 3625-3631.
[9] Steffan, Giovanni, et al. "6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26
pJ/b energy efficiency in 28nm CMOS FDSOI." 2017 IEEE International Solid-
State Circuits Conference (ISSCC). IEEE, 2017.
[10] Kim, Jihwan, et al. "A 112 Gb/s PAM-4 56 Gb/s NRZ reconfigurable transmitter
with three-tap FFE in 10-nm FinFET." IEEE Journal of Solid-State Circuits 54.1
(2019): 29-42.